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To the extent permitted by law no liability (including liability to any person by reason of negligence) will be accepted by Calixto Systems or employees for any direct or indirect loss or damage caused by omissions from or inaccuracies in this document.
IMX6ULL Versa SOM – Hardware User Manual Rev 1.0 Revision History The revision history table notes changes made between the indicated revisions of the IMX6ULL Versa SOM Hardware User’s Manual. Date Revision Description Drafted By Verified By Aug- 2020 Initial Release...
IMX6ULL Versa SOM – Hardware User Manual Rev 1.0 About This Document This document is the Hardware User Guide for the i.MX6 SODIMM System On Module based on the NXP’s i.MX6 Applications Processor. This Guide provides the overall design and usage of the i.MX6 SODIMM System On Module from a Hardware Systems perspective.
This document provides detailed information about the IMX6ULL Versa SOM Features and Hardware architecture with high level block diagram. This also provides detailed information about the edge connector and usage. IMX6ULL Versa SOM enrich the user’s design by its onboard 256/512 MB DDR3, 8MB SPI flash and 8 GB eMMC.
Rev 1.1 Note - The block diagram shows one of the possible pin outs of the SOM. Refer document IMX6ULL Versa SoM Pin Mux Table to understand different possible configurations of the SOM using the SOC Muxing rule. 1.2 IMX6ULL Versa SOM Features The IMX6ULL Versa SOM supports following features.
IMX6ULL Versa SOM – Hardware User Manual Rev 1.1 3.1 QSPI Flash QSPI NOR flash can be used as one of the boot device. 8MB configurations is available. QSPI flash is interfaced to QuadSPI port of CPU. 3.2 eMMC 4GB and 8GB variants are supported. eMMC is interfaced using MMC as shown below.
CPU signals, Ethernet signals and Input power supply are terminated in the connector. The SOM can be screwed to the base board using the mounting holes provided on SOM. The signal details of both connectors are available in document IMX6ULL Versa SoM Pin Mux Table.
IMX6ULL Versa SOM – Hardware User Manual Rev 1.1 7. Boot Pin configuration The boot ROM code uses the state of the internal register BOOT_MODE [1:0] as well as the state of various eFUSEs and/or GPIO settings to determine the boot flow behavior of the device.
IMX6ULL Versa SOM – Hardware User Manual Rev 1.1 Table-6 General Specifications 10. Ordering Information The orderable AM335x Versa NXT SoM Part Numbers are as follows. Processor Speed Grade eMMC SoM Part no 512MB With eMMC 789-0022-070 WWYY 256MB With eMMC...
IMX6ULL Versa SOM – Hardware User Manual Rev 1.1 11. SoM Pin out. Page 10 of 14...
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ENGINEERING DEVELOPMENT, DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by Calixto to be a finished end product fit for general consumer use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or ICES-003 rules, which are designed to provide reasonable protection against radio frequency interference.
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Calixto systems. This warranty does not cover any items that are in one or more of the following categories: a.
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• The repaired products shall be warranted subjected to the original warranty only (If the original warranty period left was three months, the repaired product warranty will be only for three months) • Customers shall agree that an independent third party assigned by Calixto Systems may repair the products covered under this limited warranty.
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