Avtech AV-1011B-C-LT1 Instructions Manual page 12

12
The next figure illustrates the relationship between the signals when an external TTL-
level trigger is used:
>50ns
Figure C
As before, if the delay is negative, the order of the SYNC and OUT pulses is reversed.
The last figure illustrates the relationship between the signal when an external TTL-level
trigger is used in the PW,,=PW,; mode. In this case, the output pulse width equals the
external trigger's pulse width (approximately), and the delay circuit is bypassed:
PWIN
TRIG V
—_>
(external input) | TTL LEVELS (OV and 3V-5V)
J PROPAGATION DELAY (FIXED)
PWOUT=PWIN
0 to +100V
OUT
[ AMPLITUDE,
Figure D
The delay, pulse width, and frequency (when in the internal mode), of the OUT pulse
can be varied with front panel controls or via the GPIB or RS-232 computer interfaces.