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Now the interval T is determined by 8, 000 clock pulses and thus
lasts 8, 000/fclock seconds.
The number of clock pulses N in ty
is tofelock.
Thus
ein 8000
N
AAA
E
A
quantity independent of fc]ock
Since the interval ta starts at
a count of 8, 000 (or zero) the count at the end of t9 is equal to N.
А storage and/or print command at that time transfers the count
into display storage.
The conversion process is cyclic with a conversion every 200
milliseconds.
If the new count is the same as the previous one,
the number in storage will not change,
and no display flicker
results.
The key events in each cycle are the count ''8, 000"
which initiates t9 by introducing a reference current and the
crossing of zero by the integrator which terminates t9 and
|
commands
а readout into storage.
The polarity of the refer-
ence current can be negative or positive depending on the
polarity of ein.
OPERATION
(See Figures 5 and 6)
А 40K Hz clock oscillator runs continuously (except for a 1
micro second interval during readout to prevent a logical race
condition.)
The 40K Hz clock signal drives an 8, 000 bit counter
chain consisting of three decade dividers and three flip-flops
U12B, U14A, U14B.
The decade dividers drive the three dec-
ades of storage and display.
The three flip-flops register the
1000 count and provide overrange sensing and control functions.
Waveforms at the three flip-flops are shown at "A",
"В" and
"C" of figure 6.
The state 8, 000 (defined when "B" and "C" simultaneously goto zero)
is a reference condition which occurs only once in 8, 000 pulses.
(end of T4) In detecting 8, 000 waveform "D" goes from 0 to 1,
a transition which sets the Ramp Down Latch producing a nega-
tive pulse waveform "J".
(see figure 6)
11
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