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DEDICATED RESOURCES
The dedicated resources of the Processing Unit comprise
eight processor states and the register
file~.
Each processor
:state has assigned to it a unique set of file registers to
which, except in extraordinary circums;tances, no other
:state may nain access. Thus, the register file combines
with the various states to provide "dedicated" resources
for up to eight discrete operations, as described in the
following paragraphs.
Register File
All registers in the basic and extended file are addressable
via micro instructions (µl's). User programs may use these
µl's to gain direct access to a limited number of registers;
certain other registers can be directly addressed only by
system programs operating through a processor state that
is empowered to execute "restricted" or "privileged"
instructions . . Finally, the 22 transient registers in the basic
·file (OA-1 F) are directly accessible only via microprograms
that have been written to
impl1~ment
the execution of
!Processing-unit instructions. For example, a microprogram
may use a transient register to store the partial results of a
Multiply instruction that could not be completed in one
major cycle. But the programmer who includes that
Multiply instruction as part of his User or System program
need not be concerned about (and indeed, may be
oblivious of) the existence of the transient registers.
The file registers are divided into four groups, as shown in
Figure 1-10, and each group is designed for optimum
efficiency within its particular usage. Table 1-2, describes
the characteristics of the integrated circuit (IC) types used
in the groups, even the registers within a group may
employ different IC's. The constraints upon each register
group are discussed below.
Basic Register File
Generally, these registers are addressable only via micro
instructions. Also, they are set or cleared as entities; that
is, they are not bit-oriented. The exception to these rules
is the Condition register. The leftmost eight bits of this
register are affected simultaneously during a Compareµ I.
Reading any of the registers in the basic file is solely aµI
function.
---------------
..
BASIC
REGISTER
FILE
GRPI
EXTENOEO
GAP II
EXTENOEO
(COMMON BLOCK)
GAP Ill
EXTENDED
11/0l
256 REGISTERS
(32 FOR EACH
OF 8 PROCESSOR
STATES)
00-1F
-
-
-
-
-
-
--iiiiiiii....iiiiiiiii ......... _____ ...
(8 REGS.)
OD
READ
DATA/AO OR
WRITE
DATA
WRITE
ADDRESS
COMM
I
I
I
Pµ
(8
REGS.)
01
I
B/A
I
ATC
T
PE
css
ADDRESS
DATA
BUS IN
I
a
CD
BUS OUT
I
a
CD
TAG OUT
I·
s(D
CHANNEL
CONTROL
BYTE
COUNT
BOC1
021
031
041
osl
osl
PM
011
BC
I
I
I
oal
ool
DAI
oBI
BUS IN
BUS OUT
TAG OUT
CHANNEL
CONTROL
BYTE
COUNT
BDC2
Figure 1-10. Register File Grouping
8
9
NOTES
ALL REGISTERS ARE 16 BITS
LONG UNLESS NOTED OTHER·
WISE
G)
16 BITS WITH ASSEMBLY/
OISASSEMBL Y OPTION
0
6 BITS WITH ASSEMBLY/
OISASSEMBL Y OPTION
DISC
1-13
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