Mcu Serial Peripheral Interface (3-Wire Spi) - Waveshare 4.2inch e-Paper V2 User Manual

Note:
(1) L is connected to VSS and H is connected to VDDIO.
(2) ↑ stands for rising edge of signal.
(3)
SDA (Write Mode) is shifted into an 8-bit shift register on every rising edge of SCL in the order
of D7, D6, ... D0. The level of D/C# should be kept over the whole byte. The data byte in the
shift register is written to the Graphic Display Data RAM (RAM)/Data Byte register or
command Byte register according to D/C# pin.

6.3.3 MCU SERIAL PERIPHERAL INTERFACE (3-WIRE SPI)

MCU Serial Peripheral Interface (3-wire SPI) The 3-wire SPI consists of serial
clock SCL, serial data SDA and CS#. The operation is similar to 4-wire SPI while D/ C# pin is not
used and it must be tied to LOW. The control pins status in 3-wire SPI is shown in Table 6-3.
In the write operation, a 9-bit data will be shifted into the shift register on every clock rising edge.
The bit shifting sequence is D/C# bit, D7 bit, D6 bit to D0 bit. The first bit is D/C# bit which determines
the following byte is command or data. When D/C# bit is 0, the following byte is command. When
D/C#bit is 1, the following byte is data. Table 6-3 shows the write procedure in 3-wire SPI.
Function
Write command
Write data
Figure 6-1: Write procedure in 4-wire SPI mode
Table 6-3: Control pins status of 3-wire SPI
SCL pin
↑
↑
SDA pin
Command bit
Data pin
10
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D/C# pin CS# pin
Tie LOW
Tie LOW
L
L