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Circuit Operation Description
(1) First, perform eye-inspection and short circuit inspection for the power stage of the logic board to exam-
ine. Then, perform the following examinations on the board in order if no problem was found.
(2) Replace IC2017(256K EEPROM) of the logic board with Test EERPOM. Change the clock setting of the
logic board to internal referring to the configuration procedures described below.
❈ If there is no available Test EEPROM, you can use PG 00 for Windows NT systems, or PG 40 for
NT/PAL compatible systems by setting address 20 to 81, 22 to 00, 23 to 00,and 70 to 01.
(3) Connect power(5V) to LD1, and check that LED(LD2000) on the left top of the board blinks at about 1
second interval.
(4) If the logic board is out of order, the LED would blink too fast or not be lighted on.
(5) If no problem was found in the above examination, connect sub-PCB for logic output examination, mea-
sure output waveform, and compare the waveform with the appended waveform of normal state.
Record either OK or NG after examination.
(6) Check drive Y s/w, drive X s/w and address signal in order.
(7) Set probe 1 of oscilloscope to trigger signal, and connect it to the TP31 of the logic board.
(8) Set oscilloscope to 2ms/div. After adjusting probe 2 to 5V/div, check output signal.
(9) After T/S, turn off the power supply, and disconnect connector.
(10) Record the result on the examination sheet (either OK or NG).
❐ Jumper settings to select internal or external clock
On the top of the logic main board, there is option jumper (CN01) that allows selecting internal/external
clock. While T/S, set it to internal clock as the following figure shows.
❈ It is set to external clock in normal. Set it to internal clock while examination, and set it to external
clock again after examination.
Figure 1. Jumper Settings to Select Internal / External Clock Signal
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Samsung Electronics
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