Digital Ssi Interface - Netzer VLR-100 Product Manual

11.2 Digital SSi Interface

Synchronous Serial Interface (SSi) is a point to point serial interface standard between a master (e.g. controller)
and a slave (e.g. sensor) for digital data transmission.
Master
Clock
Encoder
Data
Built In Test option (BIT)
The BIT indicates critical abnormality in the encoder internal signals.
'0' – the internal signals are within the normal limits, '1' – Error
The Part Number of the encoder indicates whether the encoder includes BIT. If no BIT is indicated in the PN,
there is no additional error bit.
Master
Clock
Encoder
Data
n
T
f= 1/T
Tu
Tp
Tm
Tr
fr=1/Tr
14
VLR-100-PG-V01
1 2 3 4
T
MSB
n-1 n-2 n-3
Tu
Tr
1 2 3 4
T
MSB
BIT n-1 n-2
Tu
Description
Position resolution
Clock period
Clock frequency
Bit update time
Pause time
Monoflop time
Time between 2 adjacent requests
Data request frequency
Tr
n n+1
Tp
Tm
LSB
0
n+1 n+2
Tp
Tm
LSB
0
MSB
MSB
Recommendations
12 - 20
0.1 - 5.0 MHz
90 nsec
26 - ∞ μsec
25 μsec
Tr > n*T+26 μsec
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