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5-3. IC pin description
e@ KS 56C220
Rhone o DDD
Reon
oe 6 oe oe
SEGI6 1
FBRL2SSRASRLSW
51 E nsec
SEG17
CJ 2
50
[|
—1SEG1
SEG18 C13
59 =
SEGO
SEG19 C_] 4
58
P2.0/TCLO
SEG20
5
47 (--7 P2.1
SEG21
6
46
[1
P2.2/CLO
SEG22
7
45 = P2.3/BUZ
SEG23 C18
44
P3.0/LCDCK
P8.0/SEG24 L_]9
43 [-_] P3.1LCDSY
P8.1/SEG25
CL
—]
10
KS56C220
42 | 1
P3.2
P8.2/SEG26 LC]
11
41 =
P3.3
P8.3/SEG27
12
40 [-—— XTout
P8.4/SEG28
= 13
39 [1
XTin
P8.5/SEG29
14
38 = Xin
P8.6/SEG30 C—] 15
37
Xout
P8.7/SEG31
L-—] 16
36 (1
VDD
COMO C_] 17
35
|
INC
COM1
= RESET
COM2
P1.0
rf.
RCD-750
(Dual function as segment output)
OSE EESESSSSLIA
2nSoOR°weReoowns
we
ARRARAASS
NNNWHAS
OANrA
orga
— SSS
Pin Name
Share | Input/
Function
| Reset | VO CKT |
Pin
Output
Condition
Type
P1.0
—
Input
| 4-bit input port.
Input
C
P1.1
INT1
1 or 4-bit read/test possible.
P1.2
INT2
4-bit unit pull-up resistors selectable by software.
P1.3
TCL
P2.0
TCLO
1/0
4-bit I/O port.
Input
D-A
P2.1
=
1 or 4-bit read/write/test possible.
P2.2
CLO
4-bit unit pull-up resistors selectable by software.
[
P2.3
BUZ
|
|
P3.0
LCDCK
VO
4-bit I/O port.
Input
D-A
P3.1
LCDSY
Each individual pin can
be specified as input or
P3.2
—
output.
P3.3
—
4-bit unit pull-up resistors selectable by software.
(Note)
FP a
ee
P6.0
KSO
VO
4-bit I/O port.
Input
D-B
P6.1
KS1
Each individual pin can be specified as input or
P6.2
KS2
output. 1 or 4-bit read/write/test possible.
P6.3
KS3
4-bit unit pull-up resistors selectable by software.
(Note)
|
a
P8.0 - P8.7
SEG24
Output | 1-bit controllable output.
Low Level
F-3
- 18 -
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