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Racal Instruments Manuals
Cash Counter
2151
Manual
Racal Instruments 2151 Manual page 43
20 ghz and 2.6 ghz vxi counters
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57
5B
59
60
The
enable
registers
are
set
up by
entering the
register
enable codes
in
NRl
format.
NRl
format comprises decimal
numbers
in
the
range
0
to
255
representing the
binary
codes
entered
into the
enable
registers.
See
TABLE
4.10
to
TABLE
4.12
for
register
contents.
The
following
example
illustrates
a
register bit setting
code
and
the
NRl
format
entry.
Example:
B
7654321
7
6543210
10
0
110
DIO
Line
Number:
Bit
Number:
Required
Bit
Setting:
Binary Code:
0
0
100110
NRl
Format
Decimal
Number
Code
to
be
entered:
38
NRl
format
codes
can be
entered as
single digit
numbers, two
digit
numbers
or
three
digit
numbers;
e.g.
38,
038, 005,
05,
5,
120
etc.
TABLE
4.10
Status
Byte and
Service
Request Enable
Registers
DIO
Line
Bit
Function
1
0
Not
used
-
always
logic
0
2
1
Not
used
-
always
logic 0
3
2
Not
used
-
always
logic 0
4
3
'V
=
Summary
of Device Event Status
Register
showing one
or
more
logic
1
s
5
4
'1'
—
Response message
available
6
5
*1'
=
Summary
of
Standard
Event Status
Register
showing one
or
more
Is
7
6
'1*
=
Service
requested
8
7
Not
used
-
always
logic
0
2151
OPS
A1571/DA
4-19
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