MSI B75MA-E31 Sereis Manual page 26

drAM Frequency
this item allows you to adjust the drAM frequency. please note the overclocking
behavior is not guaranteed.
Adjusted drAM Frequency
it shows the adjusted drAM frequency. read-only.
drAM timing Mode
Select whether drAM timing is controlled by the Spd (Serial presence detect)
EEproM on the drAM module. Setting to [Auto] enables drAM timings and the
following "Advanced drAM Configuration" sub-menu to be determined by BioS
based on the configurations on the Spd. Selecting [Link] or [unlink] allows users
to configure the drAM timings for each channel and the following related "Ad-
vanced drAM Configuration" sub-menu manually.
Advanced drAM Configuration
press <Enter> to enter the sub-menu.
Command rate
this setting controls the drAM command rate.
tCL
Controls CAS latency which determines the timing delay (in clock cycles) of
starting a read command after receiving data.
trCd
determines the timing of the transition from rAS (row address strobe) to CAS
(column address strobe). the less clock cycles, the faster the drAM perfor-
mance.
trp
Controls number of cycles for rAS (row address strobe) to be allowed to pre-
charge. if insufficient time is allowed for rAS to accumulate before drAM re-
fresh, the drAM may fail to retain data. this item applies only when synchro-
nous drAM is installed in the system.
trAS
determines the time rAS (row address strobe) takes to read from and write
to memory cell.
trFC
this setting determines the time rFC takes to read from and write to a memory
cell.
tWr
determines minimum time interval between end of write data burst and the start
of a pre-charge command. Allows sense amplifiers to restore data to cell.
tWtr
determines minimum time interval between the end of write data burst and the
start of a column-read command; allows i/o gating to overdrive sense amplifies
before read command starts.
trrd
Specifies the active-to-active delay of different banks.
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