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9)
Crossfade
Ramp
Generator
IC37
is
a level shifter
which
senses the
logic level
on
the
BYPASS
line.
When
the
logic
is
in
Bypass
mode,
C308
is
ordinarily at -IV.
When
the
logic
changes
to
non-Bypass
(i.e.,
Synth)
mode,
IC37
clamps
the output
of
1C38
HIGH
(towards +15V) through
CR324.
This reverses-biases
CR323,
essentially
removing
IC38 from
the
circuit.
This
permits
C308
to
produce an
exponentially-failing
ramp
by
discharging
towards ground through R333,
R331
(if
Q308
is
ON), R329, and
R330.
Q308
switches the crossfade
between
Slow (Q308
Off;
its
gate
connected
to
its
source
through R332) and Fast (Q308 On;
its
gate
clamped
to
-15V
through
R265
and diode-connected
transistor
Q309.)
IC29b and IC29c
are
logic to
determine
the
crossfade
time; crossfading
is
Slow
if
the
Center-Channel Recognition
circuit
has
caused
a state
change, and Fast
if
the
state
change was caused
by any other
means.
When
the
logic
switches
to
BYPASS,
IC38
becomes
active.
From
the point of
view
of
its
"+" input,
1C38
is
a
non-inverting amplifier with a gain
of +2.
The
amplifier
output appears
at
the
anode
of
CR325. Feedback
holds the
and
"+" inputs of
IC36a
within
2mV
of
each
other.
Therefore, the voltage on the
"+" input of
IC38
is
essentially identical to the
voltage on
C30B
except
for
a
slight
offset
introduced by
R335
which
places the
anode
of
CR325
slightly
more
negative than C308.
This
offset
permits
C308
to start to
charge
slowly
towards -IV
(through
R333
and,
if
Q308
is
ON,
R331).
The more
negative the voltage on
C308
becomes,
the
more
voltage
differential
there
is
between C3D8
and
the
anode
of
CR325,
and
therefore
the faster the
change
in
the
voltage on
C308.
A
ramp
which
starts
slowly
and then
speeds up
is
thus
produced on C308.
This "reverse exponential"
is
the mirror
image
of the process
which
occurs
when
IC38
is
clamped
OFF
by IC37.
If
it
were
not stopped,
this
process
would
continue
to
increase
in
speed
indefinitely.
Instead,
it
is
stopped
at
-IV
by IC36b. IC36b's
"+" input
is
held
to
-IV
by
R324,
R325.
As
long at
its
"+" input
is
more
negative than
its
input,
IC36b's
output
sits
close to
-15,
reverse-biasing
CR323,
which prevents
C308 from
being affected
by IC36b.
When
IC36b's
input
equals -IV,
CR323
turns
on,
closing the
feedback
loop
around IC36b and
actively
clamping
C308
to -IV.
When
this
occurs, the
output
of
IC33d goes
LOW
(-15V), indicating
"Ramp
Done"
to
the
Latch
And
Left/Right
Decode
logic
(discussed below).
IC36a,
Q310, and
associated
components form
a
voltage-to-current converter.
Feedback
from IC36a
causes
the voltage across
R334
to
equal the voltage across
C308. The
resultant
current through
R334
flows through
Q310
and
emerges from
its
collector.
Its
collector
is
connected
to
three
LED's
in
series:
the
two
in
optically-
coupled
resistors
IC51 and
IC52,
and DS5,
the front-panel
BYPASS
indicator.
The
illumination of the
BYPASS
indicator therefore
serves
to indicate
whether
the
ramp
generator
is
operating correctly.
In
particular,
it
shows
a
clear fade-in
and fade-out
when
the
ramp
speed
is
Slow.
10)
Latch
And
Left/Right
Decode
Logic
Switching of
left
and
right
audio
into
the Synthesizer
circuitry
is
effected by FET's
Q102
(left)
and
Q103
(right).
When
Bypass
mode
is
chosen, the
FET
that
was
ON
remains
ON
until
the crossfade
ramp
is
finished.
As
soon
as
the
ramp
is
finished,
the
FET
turns
OFF
to entirely isolate
the Synthesizer
from
the
main
275A
audio
outputs.
6-10
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