Icom IC-R7100 Service Manual page 17

3-2-2 REFERENCE OSCILLATOR CIRCUIT
(PLL UNIT)
The IC-R7100 employs two reference oscillator circu its.
The 5 1.2 MHz reference oscillator ci rcuit consists of
Q16 and X2. The 51 .2 MHz referenc e frequency is
appli ed to a bulter amplifier (028). The amplitied signal
enters a buffer amplifier (0 13) or a tripier (017) or a 2nd
l O circuit.
The output signal hom the VOO circuit either passes
Ihrough a three-stage lew-pass filter (L59 -L6 1, C147-
C152) and is Ihen applied
10
tne P OOUBL UN IT or is
amplified al IC3 and is Ihen appl ied
10
ICS to be mixed
with a reference treouency trom 1C9.
The resultîng signal trom
Ica
is applied 10 a low-pa ss filter
c ircuit
(11 4 , US) 10
eliminate spurious signals and is tnen
buffer-amplified al 0 15. The amplified signal is applied
10
Ihe PLL IC (ICI. pin 8).
The reference frequency trom the buffer-amplifier (0 13)
is Ihen divided by 4 al ICS aOO applied
10
Ihe PLL IC
(IC1, p in 1).
The 5 1.2 MHz reference frequency Irom Ihe tripter (0 17)
is applied
10
a fil1er circuil (L25-L27)
10
eliminale
spurious signaIs and is then buffer·amplilied at 0 18. The
amplified signaI passes through the doubler (0 19) and is
applied 1 0 a helical bandpass fi l1 er (L3 1. L32) 10 eliminale
spuriou s signaIs. The fil tered signal is mixed with a
reference frequency trom Xl and 0 14.
The 12.0 MHz reierenee oscillator circuit consists of
XI and Q4. The 12.0 MHz reierenee trequency is
generaled at
xr
and is then multiplied by 3 at Q14. The
resul ting signal is applied to ICIO 10 be mixed with a
reference f requency t rom X2 anc 0 16.
3·2·5 DOUBLER CIRCUIT (P DOUBLE UNIT)
The VCO o sc illation (389.35- 645.84995 MHz) is butter-
amplified at IGlO and is tnen applied 10 a lew-pass filter
(st rip line. CI68-C172). The fil1 ered signal is butter-
amplified at Q2 and Ihen applied 10 a doubler circuit
(01 .02, L5). The amplitied signal passes Ihrough a band·
pass filter (st rip fine. C113-C115, C175. C195, CI 96)
and a lew-pass fil1er (strip line, CI88-C I 92) 10 suppress
unwanted signaIs. The result ing 778.7-1291.7 MHz 1si
LO signal is applied 10 Ihe MIX1 UNIT 10 produce a 266.7
or 778.7 MHz 1sI IF signa!.
3-2·6 PROGRAMMABLE DIVIDER AND
PHASE DETECTOR CIRCUITS
(PLL UNIT)
The resu lting signal trom ICt 0 is butter-amplified at
ICg and is then applied 10 L19 10 eliminate the spurious
signals and then to ICS to be mixed with
veo
output from
Ihe VCO UNIT.
The programmabie divider shifts the dividing ratio with a
pre scaier depending on the operating Irequency and
determines Ihe VCO osc illaling frequency.
3·2-3 2nd LO CIRCUIT (PLL UNIT)
The pha se detector c ircu it detects the o ff-phase com-
ponents ol the VOO frequ ency using a stabie reference
Irequency.
ICl is a one-chip Pll Ie that contains a two-modulus
prescaler, a swallow counter, a programmabie divider and
a phase detector. ICl ac cepts up to 520 MHz inputs.
3·2·7 CHARGE PUMP AND LOOP FILTER
CIRCUITS (VCO AND PLL UNITS)
The phase·detected signal (pulse signal) from ICI (pins 15
aOO 16) passes through Ihe charge pump (02, 03) and is
Ihen applied
10
an aclive loop filter (04-06). The pulse
signal is converted
10
oe
voltage (PLL voltage)
1 0
control
oscillation f rom Ihe VCO UNIT. A charge pump (02. 03)
is used
10
expand Ihe range of t he PLL loek voltage. The
PLL loek voltage changes Ihe reaetanee of Ihe varactor
diodes (0 1-0 4, 06-09) in Ihe VCO c ircuit.
The Inpul signal from PLL IC (IC l. pin 8) passes through
the two-modu lus prescaier and tne programmabie cou nter
sec lions of ICI. A 10 kHz referenc e trequency is applied
10
ICI (pin 1) aOO passes Ihrough a programmabie
refe rence counter seclion of ICL Bath of the divided
sfgnals are compared at tne phase detector secUon of
ICI. The phase-delecled slgnal (pulse signal) is OUlpUI
from IC1 (pins 15 and 16).
The 51. 2 MHz reterence signaI is multiplied by 5 at
020 and is Ihen applied
10
a filte r c ircuit (L36-L38)
10
eliminat e spurious signaIs. The filtered signal iS then
buffer-amplified at Q21 and applied 1 0 the two separate
amplifier c ircuits.
(1 ) 256.0 MHz 2nd LO
The amplifi ed signal trom 021 is re-ampli fied al 024 to
obtain a 256.0 MHz 200 LO signa!.
(2) 768.0 MHz 2nd LO
The amplified signal from 0 21 is multiptled by 3 at 0 22
and is Ihen applied
1 0
a helical bandpass filter (L42)
10
elimi nate spurlous signaIs. The filtered slgnal Is buffer-
amplilied at 023
10
obtain a 768.0 MHz 2nd LO signa!.
3·2-4 VCO CIRCUIT (VCO UNIT)
The VCO ci rcuit consists of two VCO 's on Ihe VCO UNIT.
VCOI (0 1. 02, 01 -04) generales Ih e 389 .35- 514.3995
1st LO frequency, while the VC02 (03. 04, 06-0 9)
gene rates Ihe 514.35--645.84995 MHz 1sI LO signa!.
The varacto r diodes (01-04, 06 -09) provide frequency
controt. 3 - 11
Eilhe r a 256.0 MHz or a 768.0 MHz 2nd LO slgnal is
applied to Ihe 2nd mixer c ircuit (IC7) on Ihe MIX2 UNIT
10 produce a 10.7 MHz 2 nd IF signa!.