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-|—> Clieley,4
e Pin Functions (*PD4052A)
Pin
Pin Name
vO
Function and Operation
1
LCD4
OUT
Pins for outputting the segment signals to the LCD panel.
2
LCD3
OUT
3
LCD2
OUT
4
LCD1
OUT
5
COM2
OUT
Pin for outputting the common signal to the LCD panel.
Three signals— GND, 1/2Vpp, and Vop—are output to this pin, alternating in 50Hz.
Segment signals light
6
COM1
OUT | when potential difference +Vop occurs between these pins and any of LCD1 through LCD23.
7
Vpp
Power supply pin; 5V+10%, internally connected to pin 33.
8
FM
IN
A local oscillation signal (VCO), 10 to 150 MHz, is input to this pin.
The signal is frequency divided by 2 through a pulse swallow circuit.
9
AM
IN
A local oscillation signal (VCO), 0.5 to 50 MHz, is input to this pin.
10
GND
41 |
EO1
OUT
Output for the charge pump of the PLL's phase detector. When the signal obtained by frequency-dividing the
12
EO2
OUT
oscillator's signal is higher than the reference frequency, these pins become ''H''; and when lower, "'L.'"
13
CE
IN
Input pin for device selection.
14
NC
Not used
15
Xl
Connected to a crystal resonator.
16
XO
17
SD
IN
Input for controlling the auto-tuning circuit. When the unit is auto-tuned to a station, a ''H" is input to this pin,
terminating the auto-tuning operation.
| 18 |
FM/MW
OUT
The states of these pins determine which section of the tuner—i.e., FM, AM and LW-— is provided with power
as follows:
fi9 |
LW
OUT
20
LOC/DX
OUT
This pin performs LOC/DX switching. A "'H"' is output while the unit is auto-tuning in the LOC mode.
Input pins for key return signals from an external key matrix.
25 |
PB3
OUT
Pins for key return signal source; active high.
26
PB2
OUT
27
PB1
OUT
28
PBO
OUT
29
PC3
OUT
30
PC2
OUT
|
31
SDK
Not used
32
MUTE
OUT
This pin outputs signal to mute shock noise generated when the PLL circuit is unlocked.
| 33 |
Vop
34
LCD23
OUT
These pins output segment signals to the LCD panel.
é
Léps
out
20
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