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Model VP-7722P and VP-7722A are identical except indication of "A" "P". The model name VP-7722P ppears manual should read VP-7722A. A N A Y Z E R 7 7 2 2 A V I C E H A N U A...
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VP- 7 7 22P CIRCUIT DESCRIPTION POWER 3 . 1 SUPPLY A4 power supply systems are installed , those are , digital Three � · circuit , oscillator , and analyzer . 3 . 1 . l Power supply for the digital circuit �...
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VP-7722P -24V power supply is fed from smoothing capacitor regulator circuit of Ul7 ( NJM79M24A). The regulated -24V power supply is fed to the oscillator circuit via connector J21 and P2 1 . +lSV power supply regulated +24V output to the from regulator circuit...
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VP- 7722P ( A ) power supply is fed from smoothing capacitor CSS r egulator composed of Q14 through Q16 lS ( NJM4558 1 / 2 ) . The regulated - 1 5 is supplied to the analyzer circuit via connectors J21 and P21 . common used as the reference voltage...
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VP-7722P OSCILLATOR AS, A6 oscillator is made up with the OSC A6 and ATT AS boards. main 10 Hz to 1 10 kHz oscillation is installed oscillator board . amplitude of the oscillation.is controlled with amplitude regulator. the ATT board are the oscillator for the IMD TEST source , � mixer output amplitude controller .
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VP- 7 7 22P br idged-T circuit is inserted in the negative feedback loop Since the signal attenuation factor of the bridged-T �ircui t , a mpl ifier Z XRCll1l , is l /n, an amplification of n times is whe n the f r equency i s giv en to the positive feedback loop for a stable oscillation .
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VP-7722P When the peak detection system is used , the oscillation is likely to be stopped because of the external noise when the frequency is changed and some time required for restart of the oscillation. The oscillation restart circuit composed of U7 ( NJM3 1 1D ) , U8 ( TC4S28BP ), U6 ( AN6914 ) , and transistors serially monitors the oscillation...
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VP -7722P 3 . 3 . 1 Input connector A7-1 input connectors of A and B per a channel is installed in the input cir cuit so that the balanced measurement can be performed. In the unbalanced input A circuit alone is used . balanced input , inp ut,...
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VP-7722P IMD measurement filter A7-2 3 . 3 . 5 The output from the preamplif ier is also supplied to the IMD measurement filter (IMD represents the inter-modulation distortion) . The IMD measurement circuit consists 500 Hz high-pass filter composed the SOO Hz low-pass filter...
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VP-7722P 500Hz high-pass filter output spectrum and waveform: ABSO LUTE VALUE output waveform: 500Hz output waveform numerator level) and lOHz LPF output waveform denominator level ) : Numerator level Denominator level Figure 3-3 Detection method for IMO measurement...
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3-10 VP-7722P lST,. 2ND NOTCH BOARDS AS,. A9 The notch circuit ( the fundamental wave rejection filter) consists of two stages; and 2nd NOTCH board s . Two-stage multiple feedback is used obtain wide, but steep rejection of the fundamental wav e . 3 .
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Equipment required for the adjustment are listed below. Digital voltmeter VP-2660B or equivalent Oscilloscope VP-5512A or equivalent Differential voltmeter Fluke 931AB or equivalent Frequency counter Frequency: lOHz to 500kHz RC oscillator VP-7214A or equivalent AC voltage calibrator Fluke 5100 or equivalent 6000 termination 6000 ±0.1% Calibrated VP-7722A...
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VP-7722 P PREPARATION Preparations required for ad j u . s tments are as follows : ( 1 ) Turn power on and allow the instrument for warm-up for at least 30 minut e s . ( 2 ) Install all printed circuit boards t o the correct positions a s shown in Figure 4-1.
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VP-7722P @ 0:-24V •••••••••••••••••• •••••••••••••••••• A:+SV ... I •• 0 : Oscillator voltage reguretor A: Analyzer voltage reguretor Figure 4-2 Test points on POWER SUPPLY b9ard...
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772 2P Table 4-1 Voltage of each check point Test point Specifications ® ®�@ Within ±1000 mV 24 v �/osc - 24 Within ±1000 mV .--/ Osc ill ato r section 15 v Within ±100 mV Within ±150 mV - 1 5 v 15 v Within ±100 mV An al yz er se ct io n...
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p -772 VP-7722P 4 . 3 . 2 80 MHz VCO The adjustment and check procedures are as follows : ( 1 ) Supply a 3 V , 2 kHz signal from the internal oscillato r . input range to 3 . 16 V , and measure ( 2 ) S e t the front panel t o THDl mode, range to 0 .
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: Connect differential voltmeter to the OSC OUTPUT terminal shown VP-7722A Differential voltmeter Set the oscillation FREQUENCY to 400 Hz and the OUTPUT to 1 4 . 0 d B . , o.
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VP-7722P ( 5 ) Change the oscillation frequency as listed in Table 4-3 and flatness as specified in the table . Table 4-3 Flatness verification Open termination With 600n termination Test frequency Unit (Reference) (Specification) ±3% Within ±3% 1 0 . 0 20 .
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72 2P A'fl'EN UA TO R BO AR D AS ch e 1-�tiAA,,? C•tv . > ov- rl.e l M J) oscill ator output for IMD test signal t(., -1 .J.. 6 r;Us>v\. Th e ad justm ent procedure is as follows : Con nec t a differential voltmeter to test point TPl (U27 output ) .
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77 22? 4-10 Out put OFF att enu ato r che ck The che ck procedure is as follow s : Set the oscillat or frequency t o 10.00 kHz , and the OUTPUT to 1 4 . 0 dB. ng the AMPTD key , key three times Set the output to OFF by pressi...
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Adjust HF COM MODE C82 so that the waveform measured at test point TP3 is the smalles t . input preattenuator The setup for the A input preattenuator adjustment is as follows : VP-7722A Open termination ad · Just ment procedur e for the A input preatten uator is as follows : th e fl oa ti ng se le ct or to NO N FL T .
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VP-7722P ( 2 ) Connect RC oscillator to the A input terminal and set its 1 4 . 0 dB (10 Vrms ) . controls for flatness of · waveform observed on ( 3 ) Adjust according to steps shown in Table 4-7 . Front panel settings : MODE : DISTN...
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4-14 p - 77 2 2P Th e ad j u stment procedure for the A input preattenuator is as follows : output � the floating selector to FLT . Connect an oscilloscope to test l) Set p o int TP3 . cillos Si mu lta neously supply...
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VP-7722P ( 3 ) Set the voltage calibrator output to 30 mV . Adjust I/P DC OST R90 for a display reading of 0.030 V on the LEVEL display on the area of the VP-7722P. ( 4 ) Change the voltage calibrator output to 3 V. Adjust I/P DC control for a display reading of 3 .
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VP-7722P VP- 772 ( 1 ) Remove wiring for the input shortcircuit described in 4 . 8. 1 Connect input stages of lst a n d 2 n d notch stages as shown i n Figure �ate: · Connect with a wire . 1ST NOTCH 2ND NOTCH Board...
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4-20 p -772 2 P . 8 . fundamental wave rejection circuit adjustment procedure for the fundamental wave rejection circuit Th e pre para tion for the fine adjustments described latter is as follows : l ) Set the MODE to DISTN , the input range to 3 .
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< '"O ..i ..i '"O T vT .."'T"T "l 1·1 �... ""---" " REJ 3 1 :: Adjust the rejection .REJ 2 Adjust the rejection factor at 1 kHz . factor at 10 Hz. C l 2 REJ 1 •...
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VP-7722P ( 10 ) Reset the NOTCH HOLD . Verify that the auto tuning functions when the oscillator frequency changed between 16 kHz and 1 10 kHz . Note : Measure the output pins 1 and 7 of 018 and check if DC voltages satilated at ±10 V .
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y p -7722 P 4-24 4• 9 . Offset amplifier 2 The adjustment procedure for the offset amplifier 2 is as follows : 'lCy ( l ) Connect an oscilloscope to pin 1 of U25 . ( 2) Fix the measurement range to 0 . 001%. (3 ) Adjust AMP OST1 control R l 3 7 for a OV offset .
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p- 7 722P VP-7722P PSOPHO gain 4 . 9 . 5 The adjustment procedure is as follows : ( 1 ) Set the response to the AVE response � Adjus to be ( 2 ) Supply an 1 kHz , appr oximately 3 V signal from the internal oscillato the input terminal .
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4-26 Set the NOTCH HOLD of the VP-7722P to be adjusted to 1 kHz . ( �) Set the output of the calibration VP-7722P t o -10 dB . ( S) Adju st variable resistor R22 so that the display reading o f the VP-7722P to be adjusted is -20.
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VP-7 722P the display reads as follows when the frequency of ( 5 ) Check that 7 201P is changed to 300 kHz and 500 kHz : rerr. 300 kHz : -20 . 00 dB ± 1 dB 500 kHz : -20 .
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4-28 vr -7722 P Change the oscillator frequency to 1 . 5 kHz and the notch hold to 1 . 5 kHz . Alternately adjust REJl and REJ2 controls R l l 5 and R l l 8 that rem ainder of fundamental wave and the measured value in the THDl mode are the smalles t .
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4 . 1 2 TROU B LESHOOTING FLOW CH for VP-7722A Does the display Check A13 Inter change when any face circuit. key is pressed? Is the OSC output level correct? Does the LEVEL measure correctly? Does the DISTN measure correctly?
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4 - 3 a & the TPl output Check the OSC of OSC circuit ALC circuits. co rr ec t? Check the A circuit. Is the DC OUTPUT Is the A 7 Pre Check A7 Pre output (R76) leve level of rear panel L and R.
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VP-77 � Does the fundamental Check AS lst notch frequency reduced and A9 2nd notch at A9 TPl of 2nd notch filters. filter circuit. Check A7-2 Pre amp U31 U34. Check A12 Is the DSP MONITOR Dispay assy output of rear panel circuit.
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