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THEORY OF OPERATION
MOOEL
169
5-12.
Resistance
Measurements.
5-13.
Resistance
measurements
are made by comparing
the
voltage
drop
across
the
unknown
resistance
to
the
voltage
drop
of
an internal
reference
resistor
as shown
in Figure
5-4.
For
this
ratio
measurement
technique,
d
voltage
is
connected
to
the
input
divider
used
for
voltage
measurements
and the
range
switching
selects
a l/2
of
full
scale
value
refer-
ence
resistance
to
be
placed
in
series
with
the
unknown
resistor.
The voltage
drops
are
then
com-
pared
by the
A/D converter
and displayed
on the LCD.
A 2 kilohm
thermistor
(RTlOl)
provides
overvoltage
input
protection
for
the
low
resistance
ranges
and
it
is
in
series
with
the
reference
resistor
and the
unknown
resistor
on all
but
the
20 megohm range.
For
this
reason,
the
+V (t2.8V
nominal)
top
of
the
reference
is
selected
on the
200 ohm range.
On all
other
ranges
tl.ZV
is
used.
Since
a ratio
technique
is
used,
actual
values
of
the
reference
resistors
determine
the
primary
accuracy
for
resistance
measurements,
and no adjustments
are
necessary.
5-14.
A/D CONVERTER.
5-15.
As shown
in
Schematic
301800,
the
A/O con-
verter
and display
drivers
ape contained
on a single
integrated
circuit
(U102).
This
chip
also
contains
an oscillator
and
the
regulators
that
are
used
to
establish
the
analog
and digital
grounds.
External
components
are
used
to
establish
the
timing
and
reference
levels
required
far
A/O operation.
u102
employs
the
dual
slope
principle
of
A/D conversion.
This
method
provides
d ~asurement
cycle
consisting
of
three
consecutive
time
periods,
autozero.
signal
integrate
and
reference
integrate
(read).
Timing
for
these
periods,
and thus
the
measurement
period,
is
a function
of
the
oscillator
frequency.
The
oscillator
components
are
selected
to provide
40 kHz
which
results
in
a
100
millisecond
signal
integrate
period
for
best
rejection
of
50Hz
and
60Hz.
To
begin
each measurement
cycle.
the
autozero
period
is
set
to
a minimum
of
100
milliseconds.
During
this
period,
the
reference
voltage
input
to
the
A/D
is
stored
on capacitor
Cl11
and
the
A/D converter
is
referenced
to
analog
cornnon.
A correction
voltage
is
then
stored
on capacitor
Cl02
for
use during
the
remainder
of the
measurfment
cycle,
if
any amplifier
offset
exists.
The second
phase
of
the
measurement
cycle
is
the
100mS signal
integration
period
as
previously
mentioned.
During
this
period,
the
differential
voltage
between
IN
HI
and
IN
LO is
integrated.
At the end of this
period,
the
polarity
of
the
integrated
signal
is
also
determined.
The
final
phase
is
reference
integrate,
or read.
During
this
period,
internal
circuitry
ensures
that
the
reference
capacitor
will
be
connected
with
the
correct
polarity
to
return
the
integrator
output
to
the
autozero
level.
The
time
required
for
the
output
to
return
to
this
level
is
proportional
to
the
unknown
input
signal.
The read
period
can
be
from
zero
to
200
milliseconds.
corresponding
to
displayed
counts
of
zero
to
2000
full
scale
as
determined
by
1000
(VI,
+
VREF).
FW
input
signals
less
than
full
scale,
the
A/D
cmwrtw
rewrts
to
wtozero
far
the
remainder
of
the
reference
integrate
period.
Thus,
a complete
measurement
cycle
is
400ms.
which
results
in
a
display
update
rate
of 2-l/2
per
second.
5-16.
DISPLAY CIRCUITS.
5-17.
The
liquid
crystal
display
(LCD)
and
its
associated
circuitry
is
shown
in
Schematic
301800.
As previously
mentioned,
the
seven
segment
decoders
and drivers
are
provided
by the
A/D converter
chip
u102.
The digitized
measurement
data
is
presented
on the
output
lines
to
the
LCD.
These
lines
are
driven
by a square
wave
having
the
same amplitude
and frequency
as the
BACKPLANE line
(nominally
0 to
t5V
at
50Hz).
When the
lines
to
the
display
seg-
ments
are
driven
out
of
phase
with
BACKPLANE the
segments
are
ON.
Conversely.
when
in-phase
the
segments
are
OFF.
The
annunciators
and
decimal
points
are
turned
ON and OFF similarly,
with
the
phasing
of
their
lines
controlled
by the
range
and
function
switches
through
logic
gates.
A swnary
of
annunciator
switching
is
given
in Table
5-1.
5-2
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