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8. CIRCUIT DESCRIPTIONS
Refer to the block diagram on page 17 and the
schematic on page 3 7 for the circuit composition
of this unit.
8.1
FM TUNER
FM Front end
The FM front end employs a 4-stage variable
capacitor in the tuning circuit, dual gate MOS
FETs at the RF amplifier and mixer, and a local
oscillator with J-FET buffer.
The FM front-end input is 75f2 unbalanced
single-tuned circuit. The RF amplifier is a dual
gate MOS FET. An M-coupled double-timed circuit
is inserted between stages. The dual gate FET is an
amplifying element suitable for RF circuits, and
features extremely stable amplification because of
its low NF (Noise Figure), high PG (Power Gain)
and low feedback capacitance.
The mixer is also a dual gate MOS FET. The re¬
ception signal is applied to gate 1 and the local
oscillator signal is applied to gate 2. This ciurcuit
has low local oscillator signal injection power and
the strong reception signal has little effect on the
local oscillator.
The local oscillator is a modified Clapp circuit.
Its output signal is injected into the mixer thru a
J-FET buffer.
IF Amplifier
Four dual element ceramic filters are used as the
selection elements, and one IC (TA7302P) contain¬
ing two differential amplifiers £md one FM IF IC
(PA3001-A) are used as the amplification elements.
The TA7302P compensates for the filter inser¬
tion loss, and also limits the amplitude of the FM
signal.
The
PA3001-A
performs
IF
amplification,
amplitude limiting and FM detection. It also drives
the TUNING and SIGNAL meters and controls
muting.
The block diagram of the PA3001 is given in B'ig. 1.
Fig, 1
Block diagram of PA3001 A
FM Multiplex Decoder
The FM multiplex decoder is a PLL (Phase-
Locked-Loop) MPX IC (PAIOOI-A). Its block
diagram is given in Fig. 2.
PAIOOI-A contains a PLL VCO circuit, double¬
balance type differential demodulator with NFB
amplifier, and pilot auto-cancel circuit to improve
the distortion characteristics, frequency response,
and S/N.
The nonlinear distortion produced at the de¬
modulator has been improved by adding the NFB
amplifier to the double-balance type differential
demodulator.
'
The pilot auto-cancel circuit eliminates carrier
leakage (19kHz), without a loss of demodulated
signal frequency response.
Moreover, since the cancel signal level tracks the
inpup pilot signal level, the rejection ratio does
not drop even if the input pilot signal level changes.
IN
STEREO inS
Fig, 2
Block diagram of PAIOOI-A
FM Output Amplifier
The FM output amp is an IC (PA1002-A).
PA1002-A contains an AF amp, muting gate circuit
and power ON/OFF muting control circuit. Its
block diagram is given in Fig. 3.
The AF amp is a differentially coupled NFB
amp
featuring
excellent
dynamic
range,
S/N
and
distortion
chEuracteristics.
A
de-emphasis
characteristic is obtained by providing a frequency
selection characteristic at the NFB loop of this
amp.
The muting circuit electronically grounds the
signal circuit when a control voltage of 1.4V or
greater has been applied to pin 8 of the PA1002-A.
This control voltage is applied from pin 12 of the
PA3001-A thru the MUTING switch. A 1.4V DC
voltage is generated at pin 12 of the PA3001-A
when de-tuned more than ± 70kHz and at weak
inputs (antenna input conversion b/iV or less).
19
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