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Section
II
Paragraphs 2-94 to
2-9?
that the selected frequency (always
100
kHz)
from
the
time
base
control
assembly
A35
becomes the
driving
signal
for
the
second
group
of
decade
dividers.
2-94.
CIRCUIT
DETAILS.
Refer
to the
schematic
diagram, Figure 7-18,
for circuit details.
The basic
Ai'{D
gate
description given in Paragraph 2-6 applies
to
the gate
circuits, but
note
that
gates
1
through
6
consist
of
two
diodes.
The gates
are turned on (sig-
nal
passes) when
-15
volts
is
applied
to the
control
input
to forward-bias the diodes; the gates areturned
off
(signal btocked)
when
the -15
volti
is
removed
so
that the
fixed
bias supply
(from
+13
volts) reverse-
biases
the
diodes.
The
main gate, Q10-Q11,
is
open
when
the
gating signal
amplifier
A12
is
off,
allowing
the pulses
from amplifier
Q9
to
switch the current
flowing through
Q10
to Ql1
and
to
the output
pulse
amplifier
Q13.
The main gate
is
closed when
Q12
is
conducting
which turns
off
transistors
Q10 and
Ql1.
Thus the pulses from
Q9
are not allowed to drive
the
output pulse
amplifier
Q13.
2-95.
GATE CONTROL ASSEMBLY
A22.
2-96.
GENERAL. The main function of the gate con-
trol
assembly is
to
generate
the gating signal (which
controls the main gate in A21)
and
the sampling
trig-
ger
(which
starts the sample-rate multivibrator
in
A23). Refer tothe block diagram, Figure
2-18,
during
the following discussion.
Model 5245L
2-97.
SIGNAL
FLOW.
The gate
flip-flop
(ea-es) is
normally held
in its off
state (in
this state,
it
holds
the main
gate
closed,
preventing
counting)
by
the hold-
off signal from
A23
which
is
applied
through
e6.
The
first
gate
triggering
pulse
which occurs after the
end
of the
holdoff pulse
is
amplified by
Q1
and
steering
amplifier
Q2
and
operates
the
gate
flip-flop to its
on
state.
The next
gate
triggering pulse turns the
gate
flip-flop
off through
Ql
and
Q3.
(In
MANUAL opera-
tion -15volts is
applied as
a
start or
stop
signal thru
CR1
or
CR2
to turn the
gate
flip-flop
on
or
off.
)
The
gate
flip-flop
output
(positive pulse)is amplified with-
out
inversion
by
split-Ioad amplifier
Q?
and
passed
on
to
A21 as the
gating
pulse.
The
trailing
edge
of
the
inverted output
from
QT
triggers
the
transfer
one-shot
multivibrator
(Q8-Q9)which produces
a
30-millisecond
output
pulse; the negative pulse output
is
supplied
di-
rectly from
the multivibrator
as
the
print
command
pulse
(negative
transition
tells digital
recorder
to
accept BCD information
from
counter); the positive
pulse output
from the multivibrator
is
a)immediately
fed back
to the
gate
flip-flop
as a
hold-off
signal
thru
Q6
to
prevent retriggering
of
the gate
flip-flop until
the
regularholdoff signal fromA23
is
generated
about
a microsecond
later,
b)
delivered to A23
for amplifi-
cation as the
transfer pulse,
and c)
amplified
and
in-
verted by
Q10.
The
Q10
output
is
delivered to
A23
as
the
sampling
trigger pulse.
(In
MANUAL operation
the
sampling
trigger
output
is
shorted
to
ground by
the FUNCTION
switch).
The negative pulse
outputs
SYNC TO HOLD-
OFF
MVB
A23( r5)
TO
GATE
LIGHT
TRANSFER
PULSE
TO
a23
(2)
SAM
PLING
TRIGGER
TO
A23
(4)
GATE
TRIGGERING
FROM A2I
(GATES
t2,t3)
r'rc!3
sToP
slc
,nl
FRoM
Alstc
(F-t)
=l
AND J6
(22)
I
NEG PRINT
COMMAND
TO
Jil
(48)
GATING
SIG
TO
A2I
(MAIN
GATE)
START
SIG
,=l
FROM
A35tC(F-2):+
AND
J6
(2I)
HOLDOFF
FROM
A23
(tO)
STEERING
GATES
02349-1
osznc-d-g
2-20
Figure
2-L8.
Gate
Control Block Diagram
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