Pioneer CLD-D503 Service Manual page 18

CLD-D503, CLD-D570
DFOUT
DACLK
LRSY
ROMOUT
4} | C2FCLK
hi WwiWiw
%
Q
a
Q Ss)
ws)
Output for DIGITAL OUT
Outputs synchronous signal of subcode block
For C1, C2, signal, double correction monitor
Outputs.7.35 kHz synchronous signal
SBSY
LPpHL|H|_ ap SL bi w Aiur] & [wip O}o
y =
DOUT
EFLG
SFSY
SBCK
OUT
IN
z
|
MmiMm{~nlinain hPL
ALWYN] 1 Oo coo;r~
g
io)
Reset input. Set to "L" when power is tumed ON.
If data of SQOUT pin is needed with LSB first, set this M/L pin to "L",
16.9344 MHz. output pin
4.2336 MHz. utput pin
Output pin to control using serial control from microcomputer.
LSI test pin (normally not connected).
16.9344 MHz. crystal oscillator connection pin.
Output pin to control using serial control from microcomputer
hme
biiitiait |
Bese ee sie elle elelaPielaeleee ie
es §
1-18