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Rohm LAPIS Semiconductor ML22Q663 Manual

4-channel mixing speech synthesis lsi with built-in flash memory
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ML22Q663 / ML22Q664 / ML22Q665 / ML22Q666
4- Channel Mixing Speech Synthesis LSI with Built-in Flash Memory
■
Overview
ML22Q663/ML22Q664/ML22Q665/ML22Q666 is a 4-channel mixing speech synthesis LSI with a flash memory for sound
data. It is equipped with a I2C interface (slave).
It adopts a HQ-ADPCM
speaker amplifier for driving speakers directly. It is also equipped with a function to detect failure.
The functions necessary for sound output are integrated into a single chip, so that sound functions can be realized simply by
adding this LSI.
● Memory capacity and maximum sound production time (HQ-ADPCM
Product Name
ML22Q663
ML22Q664
ML22Q665
ML22Q666
HOST
MCU
*1
*1
, 16-bit D/A converter, and low-pass filter for high sound quality, and incorporates a 1.0W mono
Flash memory capacity
4Mbits
8Mbits
16Mbits
32Mbits
FLASH
MEMORY
Decode
MIX
2
I
C
HQ-ADPCM is "Ky's" high-quality audio compression technique.
"Ky's" is a registered trademark of Kyushu Institute of Technology, a
national university corporation.
Maximum sound production time (sec)
f
=8.0kHz
s
161
325
652
1308
Analog Signal
16bit
Filter
DAC
Volume
Application Circuit
Issue date: Jul 17, 2020
*1
algorithm, registered phrase 1024)
f
=16.0kHz
f
=32.0kHz
s
s
81
162
326
654
Speaker
MIX
AMP
FEDL22Q66X-02
40
81
163
327

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Summary of Contents for Rohm LAPIS Semiconductor ML22Q663

  • Page 1 FEDL22Q66X-02 Issue date: Jul 17, 2020 ML22Q663 / ML22Q664 / ML22Q665 / ML22Q666 4- Channel Mixing Speech Synthesis LSI with Built-in Flash Memory ■ Overview ML22Q663/ML22Q664/ML22Q665/ML22Q666 is a 4-channel mixing speech synthesis LSI with a flash memory for sound data. It is equipped with a I2C interface (slave). It adopts a HQ-ADPCM , 16-bit D/A converter, and low-pass filter for high sound quality, and incorporates a 1.0W mono speaker amplifier for driving speakers directly.
  • Page 2 FEDL22Q66X-02 ML22Q66X ■ Feature ● Sound data Speech synthesis algorithm: The algorithm can be specified for each phrase. HQ-ADPCM/4bit ADPCM2/8bit non-linear PCM / 8bit Straight PCM/16bit Straight PCM Sampling frequency: The sampling frequency can be specified for each phrase. 10.7/21.3kHz, 6.4/12.8/25.6kHz, 8.0/16.0/32.0kHz, 11.025/22.05/44.1kHz,...
  • Page 3 FEDL22Q66X-02 ML22Q66X ■ Pin Configuration (TOP VIEW) ● ML22Q66X-NNNTB/ML22Q66X-xxxTB (N.C.) (TOP VIEW) IRON RESETB IRSI TEST0 TQFP32 IRSO STATUS1 IRSCK STATUS2 IRCSB CBUSYB (N.C.) Unused pin 3/120...
  • Page 4 FEDL22Q66X-02 ML22Q66X ■ Pin Description Initial Symbol Attribute Description value 1,18 DGND Digital ground pin. — SAD0 C slave address select pin. — C slave serial clock pin. Be sure to insert a pull-up resistor between DV pin. C slave serial data input/output pin. Be sure to insert a pull-up resistor between DV pin.
  • Page 5 FEDL22Q66X-02 ML22Q66X Initial Symbol Attribute Description value Flash memory interface power supply pin. Connect to DV pin even when not using flash memory interface. — Connect a bypass capacitor between this pin and the DGND pin. 3.0V regulator outputs. Used as a power supply for flash memory. Connect a capacitor between this pin and DGND pin as close as possible.
  • Page 6 FEDL22Q66X-02 ML22Q66X Initial Symbol Attribute Description value Reset input pin. The LSI is initialized by the "L" level input. After a reset is input, all the circuits stop operating and enter the power-down state. RESETB Negative At power-on, input an "L" level to this pin. After the power supply voltage stabilizes, set this pin to an "H"...
  • Page 7 FEDL22Q66X-02 ML22Q66X ■ I/O Equivalent Circuit Classifi Circuit Overview cation Attribute: Input Power: DV Function: CMOS inputs with pull-down Applicable pin: TEST0 Attribute: Input Power: IOV Function: CMOS inputs with pull-down Applicable pin: IRON Attribute: Input Power: DV Function: CMOS inputs with pull-up Applicable pin: RESETB Attribute: Input Power: DV...
  • Page 8 FEDL22Q66X-02 ML22Q66X Classifi Circuit Overview cation Attribute: Input/output Power: DV Function: CMOS inputs Function: CMOS outputs Applicable pins: STATUS1, STATUS2, CBUSYB Attribute: Input/output Power: IOV Function: CMOS inputs Function: CMOS outputs Applicable pin: IRSI Attribute: Input/output Power: IOV Function: CMOS inputs with pull-down Function: CMOS outputs Applicable pin: IRSO Attribute: Oscillator circuit...
  • Page 9 FEDL22Q66X-02 ML22Q66X Classifi Circuit Overview cation Attribute: Analog Power: SPV Function: Sound output Applicable pins: SPP, SPM Attribute: Analog Power: SPV Function: Sound input Applicable pins: AIN Attribute: Input Power: DV Function: Nch Open Drain Applicable pins: SCL, SDA 9/120...

  • Page 10: Electrical Characteristics

    FEDL22Q66X-02 ML22Q66X ■ Electrical characteristics ● Absolute maximum rating DGND=SPGND=0V, Ta=25°C Parameter Symbol Condition Rating Unit Power supply voltage 1 — -0.3 to +6.0 Power supply voltage 2 — -0.3 to +4.6 Input voltage 1 — -0.3 to DV +0.3 Input voltage 2 —...
  • Page 11 FEDL22Q66X-02 ML22Q66X ● DC characteristics ≥DV =IOV =2.7 to 5.5V, DGND=SPGND=0V, Ta=-40 to +70°C, Load capacitance of output pin =15pF(max.) Parameter Symbol Condition Applicable pin Min. Typ. Max. Unit SAD0/SAD1/SAD2/ "H" input voltage 1 — 0.8×DV — SDA/SCL/ XT/RESETB/TEST0 IRCSB/IRSCK/ "H"...
  • Page 12 FEDL22Q66X-02 ML22Q66X ● Analog Part Characteristics ≥DV =IOV =2.7 to 5.5V, DGND=SPGND=0V, Ta=-40 to +70°C, Load capacitance of output pin =15pF(max.) Parameter Symbol Condition Min. Typ. Max. Unit RC4MHz clock frequency Ta=-40 to +70°C 3.89 4.096 4.31 kΩ AIN pin input resistance Input gain 0dB AIN pin input voltage range —...
  • Page 13 FEDL22Q66X-02 ML22Q66X ● AC characteristic ≥DV =IOV =2.7 to 5.5V, DGND=SPGND=0V, Ta=-40 to +70°C, Load capacitance of output pin =15pF(max.) Parameter Symbol Condition Min. Typ. Max. Unit Master clock duty cycle — duty μs RESETB input pulse width — — —...
  • Page 14 FEDL22Q66X-02 ML22Q66X ● AC Characteristics (I2C Interface:Fast Mode 400kHz) ≥DV =IOV =2.7 to 5.5V, DGND=SPGND=0V, Ta=-40 to +70°C, Load capacitance of output pin =15pF(max.) Parameter Symbol Max. Unit SCL clock frequency μs SCL hold time (start/restart condition) — HD;STA μs SCL clock "L"...
  • Page 15 FEDL22Q66X-02 ML22Q66X ● AC Characteristics (Flash Memory Interface) ≥DV =IOV =2.7 to 5.5V, DGND=SPGND=0V, Ta=-40 to +70°C, Load capacitance of output pin =15pF(max.) Parameter Symbol Condition Min. Typ. Max. Unit IRCSBenable time from IRON falling edge — 1000 — — EIRON IRCSB hold time from IRCSB rising edge —...
  • Page 16 FEDL22Q66X-02 ML22Q66X ■ Block diagram The block diagram is shown below. OSC4.096MHz Timing or 4.000MHz Controller RC4.096MHz Interface IRCSB IRSCK Flash Memory SAD0 Command Address IRSI IRSO SAD1 Analyzer Controller IRON SAD2 CBUSYB STATUS1 PCM Synthesizer STATUS2 Digital Mixing DGND ΔΣ...

  • Page 17: Function Description

    FEDL22Q66X-02 ML22Q66X ■ Function description ● C Interface (Slave) This serial interface conforms to the I C bus specifications. It supports Fast modes and can transmit and receive data at 400kbit/s. The SCL and SDA pins are used to input various command data and to read the status. The slave addresses are set by the SAD0 to 2 pins.
  • Page 18 FEDL22Q66X-02 ML22Q66X  Command flow when writing data (2-byte command) Start condition Slave address +W(0) Write data (ex. Command 1st byte) Write data (ex. Command 2nd byte) Stop condition - Timing chart when writing data. （2 byte command） A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D7 D6 D5 D4 D3 D2 D1 Slave Address...
  • Page 19 FEDL22Q66X-02 ML22Q66X  Command flow when reading data Start condition Slave address +W(0) RDSTAT Command Stop condition Start condition Slave address + R(1) Read data (ex. Status read) Stop condition - Timing chart when reading data. A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 Slave Address RDSTAT Command...
  • Page 20 FEDL22Q66X-02 ML22Q66X ● Volume Settings (Differences Between AVOL and CVOL) The volume can be set with 3 commands CVOL, AVOL and AMODE. The CVOL can set the volume of each channel, the AVOL can set the volume after channel mixing, and the AMODE can set the input gain to the amplifier.
  • Page 21 FEDL22Q66X-02 ML22Q66X ● Speech synthesis algorithm This LSI contains five algorithm types to match the characteristic of playback sound: 4-bit ADPCM2 algorithm, HQ-ADPCM algorithm, 8-bit non-linear PCM algorithm, 8-bit straight PCM algorithm, and 16-bit straight PCM algorithm. Key feature of each algorithm is described in the table below. Speech synthesis Compression Feature...
  • Page 22 FEDL22Q66X-02 ML22Q66X ● Memory Allocation and Creating Sound Data The flash memory is partitioned into four data areas: sound (i.e., phrase) control area, test area, sound area, and edit ROM area. The sound control area manages the sound data in the ROM. It contains data for 4,096 phrases. The sound area contains actual waveform data.
  • Page 23 FEDL22Q66X-02 ML22Q66X ● Edit ROM Function With the edit ROM function, multiple phrases can be played in succession. The following functions can be configured using the edit ROM function: • Continuous playback: There is no limit to the continuous playback count that can be specified. It depends on the memory capacity only.
  • Page 24 FEDL22Q66X-02 ML22Q66X ● Mixing function Up to 4 channels mixing playback is possible at the same time. Commands with channel designation can set channels independently.  Waveform clamp precautions for mixing When mixing, the clamp may be generated as shown in the figure below due to the calculation of the synthesis. If the clamp is known to be generated in advance, adjust the volume of each channel by CVOL command.
  • Page 25 FEDL22Q66X-02 ML22Q66X  Class D amplifier precaution on mixing When mixing with a class d amplifier, use the CVOL command to adjust the volume so that the waveform after mixing does not exceed the full amplitude. An example of adjusting the volume of the CVOL command during mixing playback is shown below. Example1) When performing 2-channels mixing playback of channel 0 and channel 1.
  • Page 26 FEDL22Q66X-02 ML22Q66X  Different sampling frequency mixing algorithm It is not possible to perform channel mixing by a different sampling frequency group. Note that when channel synthesis is performed on a sampling frequency group other than the selected sampling frequency group, playback will be faster or slower.
  • Page 27 FEDL22Q66X-02 ML22Q66X ● Misoperation detection and failure detection functions Misoperation detection and failure detection functions can be set with SAFE command. The error detection status can be read by the RDERR command, and the error bit indicating the error detection status can be cleared by the ERRCL command. In addition, OUTSTAT command can be used to send whether an error is detected or not to the STATUS1 pin or STATUS2 pin.
  • Page 28 FEDL22Q66X-02 ML22Q66X  Command error detection This LSI detects two command errors: phrase number error and command error. Use the WCMEN bit of the SAFE command to set command error detection. ① Phrase number error. Set the number of phrases (1024, 2048, 3072 or 4096) to use when creating sound data in the Speech LSI Utility. If you specify a phrase that exceeds the number of phrases specified by the Speech LSI Utility with the PLAY2 or FADR2 command, an error in the command is detected and the error bit (WCMERR) is set to "1".
  • Page 29 FEDL22Q66X-02 ML22Q66X  Speaker disconnection detection Set the speaker disconnection detection with the DCDEN bit of the SAFE command. The speaker connection status of the SPP and SPM pins is checked when the analog power-up is activated in speaker amplifier output mode by AMODE command. When the disconnection of the speaker is detected, the error bit (DCDERR) is set to "1".
  • Page 30 FEDL22Q66X-02 ML22Q66X  SPP pin and SPM pin short detection Set the SPP pin and SPM pin short detection with the SPDEN bit of the SAFE command. Detects short circuit between SPP pin and SPM pin, or SPP pin and GND (ground fault), or SPM pin and GND (ground ≥...
  • Page 31 FEDL22Q66X-02 ML22Q66X  Flash memory error detection Set the Flash memory error detection with the ROMEN bit of the SAFE command. It is possible to detect two kinds of errors. ① Flash memory read data error When an error is detected in the read data from the flash memory, the error bit (ROMERR) is set to "1". At the same time, playback of the corresponding channel is stopped.
  • Page 32 FEDL22Q66X-02 ML22Q66X  Watchdog timer overflow detection A communication error between the HOST MCU and this LSI (disconnection or short-circuit of the MCU command interface, etc.) can be detected. Set the watchdog timer overflow detection with WDTEN bit of the SAFE command. When the detection operation is started, the detection does not stop even if the WDTEN bit is set to "0".
  • Page 33 FEDL22Q66X-02 ML22Q66X The operation when no WDTCL command is entered is as follows. <When "Transition to the command standby state after power-up" is selected by the second overflow of the WDT counter> SAFE WDTCL Command WDTEN Count-up Count-up Count-up WDT counter WDT overflow WDTERR RSTERR...
  • Page 34 FEDL22Q66X-02 ML22Q66X  RST counter overflow detection By using the RST counter overflow detection, it is possible to shift the LSI to the command standby state after power-up after misoperation detection and failure detection occurs. When the overflow detection of RST counter is set by RSTEN bit of SAFE command, the detection operation will start. When the detection operation is started, the detection does not stop even if the RSTEN bit is set to "0".
  • Page 35 FEDL22Q66X-02 ML22Q66X The operation when no ERRCL command is entered is as follows. <When "Transition to the command standby state after power-up" is selected by the overflow of the RST counter> RDERR ERRCL SAFE Command RSTEN Error detection RST counter Count-up Overflow RSTERR...
  • Page 36 FEDL22Q66X-02 ML22Q66X  Detects the stop of clock input from a crystal resonator or ceramic resonator Set the "Detects the stop of clock input from a crystal resonator or ceramic resonator" with the OSCEN bit of the SAFE command. When the clock input from the crystal resonator or the ceramic resonator is stopped, the error bit (OSCERR) is set to "1". At the same time, the clock backup function is activated and the clock is automatically switched to the RC oscillator circuit (4.096MHz).
  • Page 37 FEDL22Q66X-02 ML22Q66X ● Flash memory rewrite function The flash memory can be rewritten in the following ways. SOUND LSI IRON Flash・memory interface IRCSB IRSCK IRSI IRSO The flash memory can be rewritten using the IRON, IRCSB, IRSCK, IRSI and IRSO pins that is the flash memory interface. When the PUP command and FDIRECT command are entered with the IRON pin set to "H", direct access to the flash memory is enabled from the IRCSB, IRSCK, IRSI and IRSO pins.
  • Page 38 FEDL22Q66X-02 ML22Q66X ● Chip Erase CSB/ IRCSB SCK/ IRSCK IRSI Confirm that BUSY is "0" by Status Read after Chip Erase. ● Status Read CSB/ IRCSB SCK/ IRSCK BUSY IRSI 1:erase/program executing 0:erase/program completed IRSO ● Program CSB/ 24-bit Address IRCSB SCK/ IRSCK...
  • Page 39 FEDL22Q66X-02 ML22Q66X ■ Timing chart ● Power-on timing RESETB Status Power-down After the power is turned on, the device enters the power-down state. Start up in the order of DV , SPV and IOV or DV , IOV and SPV It is possible that the DV and SPV start up at the same time and then the IOV...
  • Page 40 FEDL22Q66X-02 ML22Q66X ● Reset input timing RESETB XT/XTB Oscillating Oscillation stopped Hi-Z Reset Status Power-down During playback The same timing is applied when a reset is input during command standby. 40/120...
  • Page 41 FEDL22Q66X-02 ML22Q66X ● Flash memory interface timing IRON EIRON IRONH IRCSB ISCKF ICSH ICSS ISCKL IRSCK IDIS IDIH ISCKH IRSI IFHL IFLH IDOD IRSO 41/120...
  • Page 42 FEDL22Q66X-02 ML22Q66X ● C Slave  I C Interface Timing Start Restart Stop Condition Condition Condition SU:STO HD:STA HIGH SU:STA HD:STA SU:DAT HD:DAT 42/120...
  • Page 43 FEDL22Q66X-02 ML22Q66X ● Power-up timing Slave Address CBUSYB NCRn (internal) BUSYBn (internal) Oscillation stopped Oscillating RC Oscillation (internal) Oscillation stopped Oscillating XT・XTB Power up DGND Status Power down Oscillation stabilized Awaiting command *1 When using a crystal or ceramic resonator ●...
  • Page 44 FEDL22Q66X-02 ML22Q66X ● Speaker amplifier power-up timing (DAMP bit = "0", AEN1 bit = "0", AEN0 bit = "0" → "1") AMODE command AMODE command byte byte Slave Address PUPA1 CBUSYB (internal) BUSYB (internal) 1/2SPVDD LINE output (internal) 1/2SPVDD Hi-Z 1/2SPVDD Command is being Status...
  • Page 45 FEDL22Q66X-02 ML22Q66X ● Line amplifier power-up timing (DAMP bit = "0", POP bit = "1", AEN1 bit = "0" → "1", AEN0 bit = "0") AMODE command AMODE command byte byte Slave Address PUPA2 CBUSYB (internal) BUSYB (internal) 1/2SPVDD Status Awaiting command Awaiting command POP noise suppressed...
  • Page 46 FEDL22Q66X-02 ML22Q66X ● Speaker amplifier power-down timing (DAMP bit = "0", AEN1 bit = "0", AEN0 bit = "1" → "0") AMODE command AMODE command byte byte Slave Address PDA1 CBUSYB (internal) BUSYB (internal) 1/2SPVDD LINE output (internal) 1/2SPVDD Hi-Z 1/2SPVDD Command is being Status...
  • Page 47 FEDL22Q66X-02 ML22Q66X ● Line amplifier power-down timing (DAMP bit = "0", POP bit = "1", AEN1 bit = "1" → "0", AEN0 bit = "0") AMODE command AMODE command byte byte Slave Address PDA2 CBUSYB (internal) BUSYB (internal) 1/2SPVDD Status Awaiting command Awaiting command POP noise suppressed...
  • Page 48 FEDL22Q66X-02 ML22Q66X ● WDTCL command timing WDTCL command Slave Address CBUSYB Status Normal mode（Awaiting command） Awaiting command Command is being processed 48/120...
  • Page 49 FEDL22Q66X-02 ML22Q66X ● Change volume timing by AVOL command AVOL command AVOL command byte byte Slave Address CBUSYB NCRn (internal) BUSYBn (internal) Status Awaiting command Awaiting command Command is being processed Command is being processed Speaker amplifier volume setting by AVOL commands is valid only when Class AB speaker amplifier is used. When a Class D speaker amplifier is used, the setting value is ignored and +0.0dB is selected.
  • Page 50 FEDL22Q66X-02 ML22Q66X ● Setting playback phrases using FADR command FADR command FADR command byte byte Slave Address CBUSYB NCRn (internal) BUSYBn (internal) Status Awaiting command Awaiting command Awaiting command Command is being processed Command is being processed 50/120...
  • Page 51 FEDL22Q66X-02 ML22Q66X ● Playback start timing by PLAY command PLAY command PLAY command byte byte Slave Address CBUSYB NCRn (internal) BUSYBn (internal) 1/2SPVDD 1/2SPVDD Address is being Status Awaiting command Awaiting command Playing Awaiting command controlled Command is being processed When the first byte of the PLAY command is input, the device waits for the input of the second byte after the command processing time (t ).
  • Page 52 FEDL22Q66X-02 ML22Q66X ● Continuous playback timing by PLAY command PLAY command PLAY command PLAY command byte byte byte Slave Address CBUSYB NCRn (internal) BUSYBn (internal) 1/2SPVDD 1/2SPVDD Status Awaiting command Playing phrase 1 Playing phrase 2 Address is being controlled When making continuous playbacks, input the PLAY command for the next phrases within the specified time period (t after the NCR of the corresponding channel changes to "H"...
  • Page 53 FEDL22Q66X-02 ML22Q66X ● Playback start timing by START command START command Slave Address CBUSYB NCRn (internal) BUSYBn (internal) 1/2SPVDD 1/2SPVDD Address is being Status Awaiting command Playing Awaiting command controlled When the START command is input, the address data of the phrase to be played after the command processing time (t ) is read from the flash memory.
  • Page 54 FEDL22Q66X-02 ML22Q66X ● Continuous playback timing by START command FADR command START command byte byte START command Slave Address CBUSYB NCRn (internal) BUSYBn (internal) 1/2SPVDD 1/2SPVDD Status Awaiting command Playing phrase 1 Playing phrase 2 Address is being controlled When making continuous playbacks, input the START command for the next phrases within the specified time period (t after the NCR of the corresponding channel changes to "H"...
  • Page 55 FEDL22Q66X-02 ML22Q66X ● STOP command (when the FAD bit is "L") STOP command Slave Address CBUSYB NCRn (internal) fs×1cycle BUSYBn (internal) 1/2SPVDD 1/2SPVDD Status Playing Awaiting command Command is being processed ● STOP command (when the FAD bit is "H") STOP command Slave Address CBUSYB...
  • Page 56 FEDL22Q66X-02 ML22Q66X ● Playback start timing by MUON command MUON command MUON command byte byte Slave Address CBUSYB NCRn (internal) BUSYBn (internal) 1/2SPVDD 1/2SPVDD Address is being Status Awaiting command Awaiting command Playing Awaiting command controlled Command is being processed When the first byte of the MUON command is input, the device waits for the input of the second byte after the command processing time (tCB1).
  • Page 57 FEDL22Q66X-02 ML22Q66X ● Continuous playback timing by MUON command PLAY command MUON command PLAY command byte byte byte byte byte SlaveAddress SlaveAddress CBUSYB NCRn (internal) BUSYBn (internal) 1/2SPVDD 1/2SPVDD Status Awaiting command Playing Silence is being inserted Playing Address is being controlled Waiting for silence insertion to be finished After the PLAY command is input, the CBUSYB signal and NCR signal change to "H"...
  • Page 58 FEDL22Q66X-02 ML22Q66X ● Repeat playback setting/release timing by SLOOP/CLOOP command SLOOP command CLOOP command PLAY command byte SlaveAddress SlaveAddress CBUSYB NCRn (internal) BUSYBn (internal) 1/2SPVDD 1/2SPVDD Status Awaiting command 1st Repeat playing 2nd Repeat playing Awaiting command Address is being controlled Address is being controlled Command is being processed The SLOOP command is valid only during playback.
  • Page 59 FEDL22Q66X-02 ML22Q66X ● Change volume timing by CVOL command CVOL command CVOL command byte byte Slave Address CBUSYB NCRn (internal) BUSYBn (internal) Volume transition time Status Awaiting command Awaiting command Awaiting command Command is being processed Command is being processed *1 Refer to the "FADE command"...
  • Page 60 FEDL22Q66X-02 ML22Q66X ● RDVER command timing RDVER command（Write） RDVER command（Read） byte byte SlaveAddress SlaveAddress CBUSYB (internal) BUSYB (internal) Awaiting Status Awaiting command Under reading Awaiting command command Command is being processed ● RDERR command timing RDERR command（Write） RDERR command（Read） byte byte SlaveAddress SlaveAddress...
  • Page 61 FEDL22Q66X-02 ML22Q66X ● OUTSTAT command timing OUTSTAT command OUTSTAT command byte byte Slave Address CBUSYB (internal) BUSYB (internal) (internal) STATUS1 STATUS2 STATUS2 ch0 NCR output ch1 BUSYB output output status ● SAFE command timing SAFE command SAFE command byte byte Slave Address CBUSYB (internal)
  • Page 62 FEDL22Q66X-02 ML22Q66X ● Setting timing of playback phrases by FADR2 command FADR2 command FADR2 command FADR2 command byte byte byte Slave Address CBUSYB NCRn (internal) BUSYBn (internal) Status Awaiting command Awaiting command Awaiting command Awaiting command Command is being processed Command is being Command is being processed...
  • Page 63 FEDL22Q66X-02 ML22Q66X ■ Command ● Command list Each command is configured in 1-byte (8-bit) units. The PUP, WDTCL, PDWN, START, STOP, SLOOP, CLOOP and ERRCL commands are configured by one byte, the FADR2 and PLAY2 command are configured by three bytes, and the other commands are configured by two bytes.
  • Page 64 FEDL22Q66X-02 ML22Q66X ● Description of Command Functions  PUP command ・ Command The PUP command shifts from the power-down state to the command standby state. Since only the PUP command is accepted when the LSI is in the power-down state, the command is ignored if another command is input.

  • Page 65: Amode Command

    FEDL22Q66X-02 ML22Q66X  AMODE command ・ Command DAMP 1st byte DAG1 DAG0 AIG1 AIG0 AEN1 AEN0 2nd byte The AMODE command sets the analog part. The AMODE command is ignored during power-down, power-up transition, power-down transition and playback sound. When the PDWN command is input while powering up the analog parts, the LSI power downs on the setting condition when powering up the analog parts by the AMODE command.
  • Page 66 FEDL22Q66X-02 ML22Q66X Description Without pop noise suppression With pop noise suppression This bit is valid when line amplifier output is selected. When power up with pop noise suppression, the line amplifier output rises from the DGND level to the SG level at the specified time (tPUPA2).When power down with pop noise suppression, the line amplifier output falls from the SG level to the DGND level at the specified time (tPDA2).
  • Page 67 FEDL22Q66X-02 ML22Q66X Pin states at AMODE power-down are as follows. Analog output pin Condition 2.5V(typ) 3.0V(typ) DGND SPGND The timing of AMODE command is shown in the timing chart. "Speaker amplifier power-up timing (DAMP bit "0", AEN1 bit "0", AEN0 bit "0"→ "1")" "Speaker amplifier power-up timing (DAMP bit "1", AEN1 bit "0", AEN0 bit "0"→...
  • Page 68 FEDL22Q66X-02 ML22Q66X  AVOL command ・ Command 1st byte 2nd byte The AVOL command sets the volume of the speaker amplifier. This command can be input regardless of the NCR signal status. The initial value after reset release is set to-4.0dB. Also, the setting values of the AVOL command are retained when the STOP command is inputted, but they are initialized when the power is down.
  • Page 69 FEDL22Q66X-02 ML22Q66X  FADE command ・ Command 1st byte FCON2 FCON1 FCON0 FADE 2nd byte The FADE command sets the Fade function. This command can be input regardless of the NCR signal status. By using the fade function, the volume changes stepwise when the volume is changed by the CVOL command. FADE Description Fade function disabled (initial value)
  • Page 70 FEDL22Q66X-02 ML22Q66X  FDIRECT command ・ Command 1st byte PRT7 PRT6 PRT5 PRT4 PRT3 PRT2 PRT1 PRT0 2nd byte The FDIRECT command controls accesses to the flash memory using the clock-synchronous serial interface. Input the command after inputting the PUP command. If the protection code of the flash memory area is not 0x69 and the protection codes (PRT7 to PRT0) entered in the second byte match the protection code set when creating sound data, the flash memory access mode is entered.
  • Page 71 FEDL22Q66X-02 ML22Q66X  WDTCL command ・ Command The WDTCL command clears the watchdog timer counter (WDT counter). This command can be input regardless of the NCR signal status. For information about the operation of the watchdog timer, refer to the "Misoperation detection and failure detection functions (Watchdog timer overflow detection)"...
  • Page 72 FEDL22Q66X-02 ML22Q66X  PDWN command ・ Command The PDWN command is used to shift from the command standby state to the power-down state. The various settings are initialized, so the initial settings are required after power-up. It is invalid when the BUSYB signals of any channels are "L". After inputting the PDWN command, oscillation stops following the elapse of the command processing time (t The states of the analog output pins during power-down are shown below.
  • Page 73 FEDL22Q66X-02 ML22Q66X  FADR command ・ Command 1st byte 2nd byte The FADR command sets the channels and phrases to be played. This command can be input when the NCR signal of the corresponding channel is "H" level. Playback is started by the START command after the playback phrases of each channel are specified. The phrases (F9-F0) to be played back are specified when creating sound data.

  • Page 74: Play Command

    FEDL22Q66X-02 ML22Q66X  PLAY command ・ Command 1st byte 2nd byte The PLAY command is played by specifying channels and phrases. This command can be input when the NCR signal of the corresponding channel is "H" level. The phrases (F9-F0) to be played back are specified when creating sound data. Set the phrase specified when creating. This command can only set up to 0 to 1023 phrases.
  • Page 75 FEDL22Q66X-02 ML22Q66X  START command ・ Command 1st byte The START command starts playing back the specified channels. Specify the phrase to be played by the FADR command prior to entering the START command. Setting the CH0 to CH3 bit to 1 plays back the corresponding channel. This command can be input when the NCR signal of the corresponding channel is "H"...
  • Page 76 FEDL22Q66X-02 ML22Q66X  STOP command ・ Command 1st byte The STOP command stops playing back the specified channel. Setting the CH0 to CH3 bit to "1" stops playback of the corresponding channel. When the corresponding channel stops playing back, the NCR and BUSYB signals become "H". The STOP command can be input regardless of the status of the NCR during playback operation.
  • Page 77 FEDL22Q66X-02 ML22Q66X  MUON command ・ Command 1st byte 2nd byte The MUON command inserts silence between two phrases to be played. This command can be inputted when the NCR signal of the corresponding channel is "H" level. Repeated playing back (the SLOOP command) of the MUON command is not possible. The silence duration (t ) is specified by the M7-M0 bits and can be set from 20ms to 1,024ms in 252 steps at 4ms intervals.
  • Page 78 FEDL22Q66X-02 ML22Q66X  SLOOP command ・ Command 1st byte The SLOOP command sets the repeat playback of the specified channel. Setting the CH0 to CH3 bit to 1 repeatedly plays back the corresponding channel. This command can be input when the NCR signal of the corresponding channel is "H" level. When repeat playback is set, playback is repeatedly performed until the repeat playback setting is canceled by the CLOOP command or playback is stopped by the STOP command.
  • Page 79 FEDL22Q66X-02 ML22Q66X  CLOOP command ・ Command 1st byte The CLOOP command releases repeat playback of the specified channel. This command can be input regardless of the NCR signal status. Setting the CH0 to CH3 bit to "1" cancels repeat playback of the corresponding channel. When repeat playback is released, the NCR signal becomes "H"...
  • Page 80 FEDL22Q66X-02 ML22Q66X  CVOL command ・ Command 1st byte 2nd byte The CVOL command sets the playback volume of the specified channel. This command can be input regardless of the NCR signal status. Setting the CH0 to CH3 bit to 1 sets the volume of the corresponding channel. The volume can be set at 128 levels.
  • Page 81 FEDL22Q66X-02 ML22Q66X The volume can also be set at 32 levels by fixing the CV1 and CV0 bits to "0". CV6-CV2 Description CV6-CV2 Description 0.00dB (initial value) -6.31dB -0.28dB -6.90dB -0.58dB -7.55dB -0.88dB -8.24dB -1.20dB -9.00dB -1.53dB -9.83dB -1.87dB -10.74dB -2.22dB -11.77dB -2.59dB...
  • Page 82 FEDL22Q66X-02 ML22Q66X  RDSTAT command ・ Command 1st byte The RDSTAT command reads the internal operating states. This command can be input regardless of the NCR signal status. When reading the status of the second byte after command input, set the SI pin to "L". The internal operating states read in the second byte are as follows: 2nd byte Output data...
  • Page 83 FEDL22Q66X-02 ML22Q66X  RDVER command ・ Command 1st byte The RDVER command read sound ROM information. This command can be input regardless of the NCR signal status. When reading the sound ROM information in the second byte after command input, set the SI pin to "L". The sound ROM information read in the second byte is as follows: 2nd byte Output data...
  • Page 84 FEDL22Q66X-02 ML22Q66X  RDERR command ・ Command ERSEL 1st byte The RDERR command read misoperation detection and failure detection status. This command can be input regardless of the NCR signal status. When reading error information in the second byte after command input, set the SI pin to "L". If the outputs of misoperation detection and failure detection are selected by OUTSTAT command, and the read data is all "L"...
  • Page 85 FEDL22Q66X-02 ML22Q66X  OUTSTAT command ・ Command 1st byte PORT STA1 STA0 2nd byte The OUTSTAT command selects the internal operating states output to the STATUS1 pin and STATUS2 pin. This command can be input regardless of the NCR signal status. PORT Description STATUS1 Pin setting...
  • Page 86 FEDL22Q66X-02 ML22Q66X  FADR2 command ・ Command 1st byte 2nd byte 3rd byte The FADR2 command sets the channels and phrases to be played. This command can be input when the NCR signal of the corresponding channel is "H" level. Playback is started by the START command after the playback phrases of the channels are specified.
  • Page 87 FEDL22Q66X-02 ML22Q66X  PLAY2 command ・ Command 1st byte 2nd byte 3rd byte The PLAY2 command is played by specifying channels and phrases. This command can be input when the NCR signal of the corresponding channel is "H" level. The phrases (F11-F0) to be played back are specified when creating sound data. Set the phrase specified when creating. The channel settings are as follows: Description Channel 0...
  • Page 88 FEDL22Q66X-02 ML22Q66X  SAFE command ・ Command 1st byte 2nd byte OSCEN RSTEN WDTEN ROMEN SPDEN TSDEN DCDEN WCMEN The SAFE command is used to set the operation of the misoperation detection function and the failure detection function. The initial value is the operation stop state ("0"). When this bit is set to "1", operation starts. Error setting Description WCMEN...
  • Page 89 FEDL22Q66X-02 ML22Q66X  ERRCL command ・ Command The ERRCL command is a command that clears error bits that can be read by the RDERR command. This command can be input regardless of the NCR signal status. However, if the error continues, the error bit remains in the error status even if the ERRCL command is entered. For the timing of the ERRCL command, refer to the "ERRCL command timing"...
  • Page 90 FEDL22Q66X-02 ML22Q66X ■ Command Flowchart ● 1-byte command input flow (Applies to PUP, WDTCL, PDWN, START, STOP, SLOOP, CLOOP, and ERRCL commands.) Start CBUSYB "H"? Command input CBUSYB "H"? 90/120...
  • Page 91 FEDL22Q66X-02 ML22Q66X ● 2-byte command input flow (Applies to AMODE, AVOL, FADE, FDIRECT, FADR, PLAY, MUON, CVOL, OUTSTAT, SAFE commands.) Start CBUSYB "H"? 1st byte command input CBUSYB "H"? 2nd byte command input CBUSYB "H"? 91/120...
  • Page 92 FEDL22Q66X-02 ML22Q66X ● 3-byte command input flow (Applies to FADR2 and PLAY2 commands) Start CBUSYB "H"? 1st byte command input CBUSYB "H"? 2nd byte command input CBUSYB "H"? 3rd byte command input CBUSYB "H"? 92/120...
  • Page 93 FEDL22Q66X-02 ML22Q66X ● Read flow (Applies to RDSTAT, RDVER, RDERR commands) Start 1st byte command input CBUSYB "H"? Read status (SI="L") 93/120...
  • Page 94 FEDL22Q66X-02 ML22Q66X ● Power-on flow Power on, RESETB "L" Wait 10us RESETB "H" Power-down state ● MCU command interface flash memory access migration/cancel Power-down state PUP command FDIRECT command ChipErase Wait 5s(typ) StatusRead Program 256byte units Flash memory access Wait 0.4ms(typ) StatusRead Write end? *:Wait times are checked by StautsRead...
  • Page 95 FEDL22Q66X-02 ML22Q66X ● Analog power-up flow Power-down state PUP command ※ When enabling the detection of speaker disconnection and short SAFE Command circuit Within 10 ms AMODE Command Analog power-up state ● Playback start flow Analog power-up state Playback end ※...
  • Page 96 FEDL22Q66X-02 ML22Q66X ● Playback stop flow During playback STOP Command Wait RDSTAT Command CBUSYB "H"? Read status (SI="L") BUSYB "H"? ● Continuous playback flow PLAY/START/MUON Command During playback Within 10 ms PLAY/START/MUON Commands Start continuous playback 96/120...
  • Page 97 FEDL22Q66X-02 ML22Q66X ● Loop playback start flow PLAY/START Command During playback Within 10 ms SLOOP command Start loop playback ● Loop playback stop flow During loop playback Stop after phrase ends Forced stop CLOOP command STOP Command Loop stop Loop stop ●...
  • Page 98 FEDL22Q66X-02 ML22Q66X ● Detailed flow of "Power-up → Playback → Power-down" Power-down state CBUSYB "H"? 2nd byte of PLAY Command PUP command CBUSYB "H"? CBUSYB "H"? RDSTAT Command 1st byte of SAFE command CBUSYB "H"? CBUSYB "H"? Read status (SI="L") 2nd byte of SAFE Command BUSYB...
  • Page 99 FEDL22Q66X-02 ML22Q66X ● Processing flow for speaker short detection SPDERR occur Check STATUS1, 2 pins "H" RDERR Command CBUSYB "H"? Read status (SI="L") ※ Confirm that the SPDERR bit is "H". Playback end STOP Command 1st byte of AMODE CBUSYB command "H"? CBUSYB...
  • Page 100 FEDL22Q66X-02 ML22Q66X ● 1-byte command input flow in two-times input mode Start Selects the output of misoperation detection and failure detection to the STATUS1 or STATUS2 pin by OUTSTAT command. First command input First ERRCL command input Second command input Second ERRCL command input STATUS1, 2 pins...
  • Page 101 FEDL22Q66X-02 ML22Q66X ● 2-byte command input flow in two-times input mode Start Selects the output of misoperation detection and failure detection to the STATUS1 or STATUS2 pin by OUTSTAT command. First command input (1Byte) First ERRCL command input Second command input (1Byte) Second ERRCL command input STATUS1, 2 pins...
  • Page 102 FEDL22Q66X-02 ML22Q66X ● 3-byte command input flow in two-times input mode Start Selects the output of misoperation detection and failure detection to the STATUS1 or STATUS2 pin by OUTSTAT command. First command input (1Byte) First ERRCL command input Second command input Second ERRCL command input (1Byte) STATUS1, 2 pins...
  • Page 103 FEDL22Q66X-02 ML22Q66X ● Read flowchart in two-times input mode (Applies to RDSTAT, RDVER commands) Start Selects the output of misoperation detection and failure detection to the STATUS1 or STATUS2 pin by OUTSTAT command. First command input First ERRCL command input Second command input Second ERRCL command input STATUS1, 2 pins...
  • Page 104 FEDL22Q66X-02 ML22Q66X ● Read flowchart in two-times input mode (Applies to RDERR command) Start First command input Second command input CBUSYB "H"? First read Second read Read data All "L"? When the OUTSTAT command is used to select the misoperation detection and failure detection outputs and the STATUS1 or STATUS2 pin is "H", if all the read data is "L", the data cannot be read normally.
  • Page 105 FEDL22Q66X-02 ML22Q66X ■ Peripheral circuit ● Handling of SG Pin The SG pin is the signal ground for the built-in speaker amplifier. Connect a capacitor between this pin and the SPGND to prevent noises. Symbol Recommended Constant 0.1μF±20% ● Handling of V The V pin is a power supply for the internal circuits.
  • Page 106 FEDL22Q66X-02 ML22Q66X ■ Application Circuit ● C interfaces (DVDD=2. 7V to 3. 6V) The V handling differs from DV =3.3V to 5.5V. 106/120...
  • Page 107 FEDL22Q66X-02 ML22Q66X ● C interfaces (DVDD=3. 3V to 5. 5V) The V handling differs from DV =2.7V to 3.6V. 107/120...
  • Page 108 FEDL22Q66X-02 ML22Q66X ■ Recommended ceramic resonator Recommended ceramic resonators are shown below. ● MURATA Corporation Frequency [Hz] Product Name Built-in load capacity [pF] CSTCR4M00G55B-R0 4.096M CSTCR4M09G55B-R0 ■ RC4MHz characteristic RC4MHz characteristic is as follows. 4.31(+5%) 4.22(+3%) 4.096 3.97 (-3%) 3.89 (-5%) Operating temperature [ This graph is for reference only and does not guarantee the electrical characteristic.
  • Page 109 FEDL22Q66X-02 ML22Q66X ■ Limitation on the operation time (Playback operating time) This LSI operating temperature is 70 C (max). But the average ambient temperature at 1W playback (8ohm drive) for 10 C. (max (the package heat resistance θja=31.58[ years in the reliability design is Ta=60 C/W])) When this LSI operates 1W playback (8ohm drive) consecutively, the product life changes by the package temperature rise by the consumption.
  • Page 110 FEDL22Q66X-02 ML22Q66X ■ Package Dimensions ● ML22Q66X-NNNTB / ML22Q66X-xxxTB Notes for heat sink type Package This LSI adopts a heat sink type package to raise a radiation of heat characteristic. Be sure to design the land pattern corresponding to the heat sink area of the LSI on a board, and solder each other. The heat sink area of the LSI solder open or GND on the board. 110/120...
  • Page 111 FEDL22Q66X-02 ML22Q66X 111/120...
  • Page 112 FEDL22Q66X-02 ML22Q66X ■ Differences from Existing Speech Synthesis LSIs (ML2286X) Parameter ML2286X ML22Q66X ← MCU command interface 4.096MHz 4.096MHz Clock frequency (Built-in crystal oscillation (Crystal oscillation circuit/built-in RC oscillation) circuit) 863：4Mbits(P2ROM) 663：4Mbits (Flash memory) Memory 864：8Mbits(P2ROM) 664：8Mbits (Flash memory) Built Capacitance 665：16Mbits (Flash memory) 865：16Mbits(P2ROM)
  • Page 113 FEDL22Q66X-02 ML22Q66X It becomes command-compatible with ML2286x/87x by using the following command setting. Command name Bit name Bit value AMODE FADR PLAY START CH2/CH3 STOP CH2/CH3 MUON CH2/CH3 SLOOP CH2/CH3 CLOOP CH2/CH3 CVOL CH2/CH3 113/120...
  • Page 114 FEDL22Q66X-02 ML22Q66X ■ Speech LSI Utility Setting Items Set the following items on the Speech LSI Utility. Item Description Set any 8-bit data. ・0x69: Flash memory cannot be accessed by the Protection code for flash memory FDIRECT command. ・Other than 0x69: Accessing the flash memory is access enabled when the protection unlock data entered by the FDIRECT command matches the data.
  • Page 115 FEDL22Q66X-02 ML22Q66X ■ Check lists This check list has notes to frequently overlooked or misunderstood hardware features of the LSI. Check each note listed up chapter by chapter while coding the program or evaluating it using the LSI. ■Feature [ ] *1 Handle V pin in two different ways depending on the voltage range 2.7-3.6V or 3.3-5.5V.
  • Page 116 FEDL22Q66X-02 ML22Q66X ■Function description ●I C interface (Slave) [ ] When I2C is used, be sure to connect a pull-up resistor SCL and SDA pins between and DV ◆ Command flow when reading data [ ] The data to be read is updated by inputting RDSTAT/RDERR/RDVER command. Be sure to enter the RDSTAT/RDERR/RDVER command before reading the internal status.
  • Page 117 FEDL22Q66X-02 ML22Q66X ●Continuous playback timing by START command [ ] When making continuous playbacks, send the START command for the next phrases within the specified time period (tcm) after the NCR of the corresponding channel changes to "H" level. [ ] When the playback is not continuous, input the START command for the next phrases after confirming the playback is completed by RDSTAT command, etc.
  • Page 118 FEDL22Q66X-02 ML22Q66X ◆ CLOOP command [ ] Be sure to specify one of the channels for the channel setting (CH0-CH3).Do not input it to "0" (all “0”) with specifying nothing. If it is input with specifying nothing (all "0"), the command is ignored. ◆...

  • Page 119: Revision History

    FEDL22Q66X-02 ML22Q66X ■ Revision history Page Document No. Date Description Previous Current edition edition ― ― FEDL22Q66X-01 Apr 24, 2020 Formal 1st edition. ，SPV FEDL22Q66X-02 Jul 17, 2020 Added “DV and IOV can be set independently. ≥DV (SPV )” to the description of power-supply voltage. Changed description of SCL pin to “be sure to insert a pull-up resistor between DV pin.”...
  • Page 120 11) Please use the Products in accordance with any applicable environmental laws and regulations, such as the RoHS Directive. For more details, including RoHS compatibility, please contact a ROHM sales office. LAPIS Semiconductor shall have no responsibility for any damages or losses resulting non-compliance with any applicable laws or regulations.

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