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Vitrek V152 Installation And Setup

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Model V152

Installation and Setup

The Model V152 is shipped in an anti-static bag with a styrofoam packing container. Carefully
remove the module from its anti-static bag and prepare to set the various options to conform to
the operating environment. Make sure that all anti-static precautions are taken to avoid
damaging the module.
The V152 consists of a VME Single Board Computer and a VXIbus adapter unit. Both of these
cards require various strap and switch selections to be set before installing the module in the
VXI chassis. The following chart shows the strap/switch selections along with their default
configurations. If any of the user requirements vary from the default configuration, consult the
following sections for changing the parameter. The V152 will be referred to as two components,
the V152 adapter and the V152 SBC (Single Board Computer). Any reference to switch and
strap locations on the V152 adapter can be found in this manual. Any references to strap and
switch settings on the V152 SBC can be found in the companion manual for the VME SBC
installed in the V152. Please refer to Appendix A of this manual for the location of the straps
and switches on the V152 adapter.
Selectable Parameter
Default Value
Slot0/Non-Slot0 Configuration
Slot 0 Configuration
Logical Address
0
System Controller
Enabled

Slot0 Configuration

The V152 may be configured as a Slot0 controller or as a non-Slot0 controller. The V152 is
shipped from the factory as a Slot0 controller. Several strap and switch setting must be set to
enable the V152 Slot0 functionality.
The V152 must first be setup as system controller to assume the responsibilities of a Slot0
controller. A switch setting on the V152 must be set and a strap on the SBC must also be
installed. The switch on the V152 is labeled SW2 and the switch location of interest is position
1. This switch must be placed in the OPEN (1) position to allow the V152 to function as a Slot0
controller.
This switch controls the direction of the VXIbus signals SYSCLK and BCLR.
Setting this switch to the CLOSED (0) position enables the V152 to receive the SYSCLK and
BCLR signals for non-Slot0 applications. A strap on the V152 SBC must also be set to match
the setting on the V152 adapter. If the V152 adapter is configured as a system controller, the
V152 SBC must also be configured the same way.
The next selection to be made concerns the VXIbus MODID (Module ID) signal and an internal
signal on the V152 indicating Slot0 operation. These selections are made via three of the
switch positions of switch SW2. Position 2 controls the internal indication for Slot0 operation.
1

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  • Page 1: Installation And Setup

    A switch setting on the V152 must be set and a strap on the SBC must also be installed. The switch on the V152 is labeled SW2 and the switch location of interest is position 1. This switch must be placed in the OPEN (1) position to allow the V152 to function as a Slot0 controller.

  • Page 2: Non-Slot0 Configuration

    VXIbus. A set of straps on the V152 adapter controls whether this signal is sourced onto VXI by the internal clock of the V152 or not sourced by the V152. To alter the selection, two straps must be moved. The V152 is configured at the factory to source the CLK10 signal from the internal clock.

  • Page 3: Logical Address

    When the V152 is the Slot0 controller, it must be located in the left-most slot (Slot0) and be set for Logical Address 0. If the V152 is not the Slot0 controller, it may be located in any other slot in the chassis and set for Logical Address 1 through 255. To statically assign a Logical Address to the V152, simply set the 8-position DIP switch to the desired Logical Address in the range of 1 through 254.

  • Page 4: Clk10 Signal Generation

    CLK10. When the straps are installed in the INT (INTERNAL) position, the CLK10 signals are driven by a clock source on the V152. If the V152 is to be located in a non-Slot0 position in the chassis, the CLK10 signals must be disabled from driving CLK10 by placing the 2 sets of...

  • Page 5: Installation

    After all the user selectable configuration parameters have been setup, the module may then be inserted into the VXI chassis. If the V152 is configured for Slot0 operation, insert the V152 into the left-most slot (Slot0) of the VXI chassis. For a non-Slot0 configuration, insert the V152 into any slot in the range of 1 through 13.

  • Page 6: Vxibus Configuration Registers And Operational Registers

    Model V152 VXIbus Configuration Registers and Operational Registers The following table shows the various registers located in A16 space for the V152 Slot 0 Controller. A16 Offset Write Access Read Access Logical Address Register Identification Reserved Device Type Register Status/Control Register...

  • Page 7: Device Type Register

    Logical Base Address of the V152. This register contains the Model Code of the V152. Since the V152 is an A16-only device, the entire 16-bits of this field is used for the Model Code. Model Codes for VXI Slot0 devices must be in the range of 00 to FF .

  • Page 8: Status/Control Register

    The Status/Control Register is a write/read register located at an offset of 04 from the A16 Logical Base Address of the V152. This register contains write-only, read-only and write/read bits. This register is used to monitor the Module ID VXI signal, control the assertion of SYSFAIL, control Soft Reset, and check the status of the Power-On Self Test.

  • Page 9: Protocol Register

    The Protocol Register is a read-only register located at an offset of 08 from the A16 Logical Base Address of the V152. The Protocol Register is accessed by executing a read to this address location and the Signal Register is accessed by writing to this location. The Protocol Register is used to define the communication capabilities of the Message Based Device.

  • Page 10: Write Signal Register

    The Write Signal Register is a write-only register located at an offset of 08 from the A16 Logical Base Address of the V152. A write operation to this register address accesses the Signal Register. This register is used for device to device signaling. This register can be read at offset 3C in A16 address space.

  • Page 11: Response Register

    The Response Register is a read-only register located at an offset of 0A from the A16 Logical Base Address of the V152. This register is used to return the status of a device’s communication registers and their associated functions. The following diagram shows the bit layout for the Response Register on the V152.

  • Page 12: Data Low Register

    The Suffix High Register is a read-only register located at an offset of 20 from the A16 Logical Base Address of the V152. This register is used in combination with the Suffix Low Register to determine the module model number suffix. The Suffix High Register contains the first two ASCII characters of the suffix and the Suffix Low Register contains the last two characters.

  • Page 13: Serial Number High Register

    Module ID Register. Before any of the MODID lines can be asserted by the V152, the Output Enable bit (bit 13) of this register must be set to a one. When the outputs are enabled, setting a MODID bit location to a one asserts the corresponding MODID signal.

  • Page 14: Interrupt Status Register

    The interrupt acknowledges cycle executed by the Interrupt Handler reads a 16-bit value from the V152. The lower 8-bits of this data reflects the Logical Address of the device generating the interrupt. The upper 8-bits reflects the cause of the interrupt. Of the upper 8-bits, only 2 of them are used by the V152.

  • Page 15: Interrupt Control Register

    The Interrupt Control Register is a write/read register located at an offset 2C from the A16 Logical Base Address of the V152. This register is used to configure the V152 for interrupt sourcing. The Interrupt Request Level, Interrupt Enable, and Interrupt Source Mask are contained in this register.

  • Page 16: Trigger Interrupt Mask/Trigger Interrupt Source Register

    The Trigger Interrupt Mask/Trigger Interrupt Source Register is located at an offset of 2E from the A16 Logical Base Address of the V152. This register serves two purposes, depending on the direction of the transfer. A write operation to this register address accesses the Trigger Interrupt Mask Register.
  • Page 17 ECL TG1:0 ECL TRIGGER INTERRUPT 1 and 0 are read-only bits that are read as a one when the V152 has received the assertion of the corresponding VXI ECL Trigger line and the Interrupt Mask bit was enabled. Reading this bit as a zero indicates that...

  • Page 18: Trigger Interrupt Source Clear Register

    The Trigger Interrupt Source Cleat Register is a write-only register located at an offset of 30 from the A16 Logical base Address of the V152. This register is used to clear the Interrupt Source bits in the Trigger Interrupt Source Register once they have been set by the receipt of a preselected trigger input.

  • Page 19: Trigger Timer Configuration Register

    The Trigger Timer Configuration Register is a write-only register located at an offset of 34 from the A16 Logical Base Address of the V152. This register is used to configure the timer interval and specify the trigger signals to assert once the Trigger Timer expires. The Trigger...
  • Page 20 Model V152 Timer , which is a 32-bit modulo-n type counter, can be tied to any or all of the trigger signals. At a predetermined interval, the enabled trigger signals are pulsed for a period of approximately 1.5 microseconds. The actual register accessed through this A16 address offset is determined by the four most significant bits of the Miscellaneous Control Register at offset 3C .
  • Page 21 Model V152 combination with the Trigger Timer Low Register to determine the number of 100 nanosecond increments between trigger assertion. The following diagram shows the bit pattern for the Trigger Timer Low Register. Write-Only Bit(s) Mnemonic Meaning 15:0 TMR15:0 TIMER DATA 15 through 0 are write-only bits used to establish the interval at which trigger signals are asserted.
  • Page 22 SBC. The V152’s SBC can respond as a slave on the VXIbus. The V152 can respond to 32 megabyte block of extended space addresses (A32 address space). The RAM on the SBC can be accessed in both standard and extended address space.
  • Page 23 Model V152 The following diagram shows the bit layout of the Location Monitor Interrupt Control Register. WDAT RDAT WSGL Read/Write DATA DATA SGNL Bit(s) Mnemonic Meaning 15:8 Not Used These bits are not used and read as zeros. ERROR INTERRUPT SOURCE is a write/read bit which is used to read and to clear the interrupt source generated from an ERROR interrupt.
  • Page 24 The Miscellaneous Control Register is a write-only register located at an offset of 3C from the A16 Logical Base Address of the V152. This register is used to set and clear the ERR bit in the Response Register of the V152, to set the WRITE READY and READ READY bits in the Response Register, and to control which buried register is accessed through the Trigger Timer Configuration Register address.
  • Page 25 Reserved Reserved Reserved Reserved MFG BIT MANUFACTURING BIT is write-only bit used to test the V152 during the manufacturing process. This bit must be set to a zero when writing to this register. 10:4 Not Used These bits are not used and must be set to zeros.
  • Page 26 The Read Signal Register is a read-only register located at an offset of 3C from the A16 Logical Base Address of the V152. A write operation to the Signal Register is addressed to offset 08 . This register is used for device to device signaling for message based devices. A signal received from a device contains the devices’...
  • Page 27 VME Extended Address - 0800 0000 FFFFFFF The complete A16 and A24 addressing range are supported by the V152. The A32 addressing range is limited due to the amount of memory that the SBC contains. The only restriction is that the Resource manager cannot allocate A32 operational register space in the range of...
  • Page 28 0, wait for a period of time, negate ECL trigger 0, wait for a period of time, and then negate VXI trigger line 5. The V152 is set for Logical Address 0, which results in a A16 Logical Base Address of C000 Shown in pseudocode, the trigger sequence can be sourced as follows: short_a16_write ( 0xC032, 0x120);...
  • Page 29 , and the Trigger Timer Control is loaded with 8010 . The V152 is set for Logical Address 0, which results in a A16 Logical Base Address of C000 Shown in pseudocode, the trigger sequence can be setup as follows: short_a16_write ( 0xC03C, 0x00);...
  • Page 30 The V152 can respond to these signals by either polling or by an interrupt. Once an enabled trigger source is received by the V152, it is latched and ‘held’ until cleared by programmed control. To enable a specific trigger line source...
  • Page 31 0 in the Trigger Interrupt Mask Register and waiting for the source to be set in the Trigger Interrupt Source Register. This routine is using the polling technique instead of an interrupt driven mechanism. For this example, the V152 is set for Logical Address 0, which results in a A16 Logical Base Address of C000 The pseudocode for this example is as follows: short_a16_write ( 0xC02E, 0x01);...
  • Page 32 Model V152 APPENDIX A...
  • Page 33 Model V152 APPENDIX B This Appendix shows the allocation of signals on the VXIbus P1 and P2 Connectors, the SCSI Connector, the Ethernet Connector and the Serial Port Connector. VXI P1 Connector Assignments: Row A Row B Row C BBSY*...
  • Page 34 Model V152 VXI P2 Connector Assignments: Row A Row B Row C ECLTRG0 +5 V CLK10+ -2 V CLK10- ECLTRG1 RESERVED -5.2 V MODID12 LBUSC00 MODID11 LBUSC01 -5.2 V MODID10 LBUSC02 MODID09 LBUSC03 MODID08 LBUSC04 MODID07 LBUSC05 -5.2 V +5 V...

  • Page 35: Rs232 Function

    Model V152 Serial Port Pinout Pin Number RS232 Function DCD (Data Carrier Detect, Input) RXD (Receive Data, Input) TXD (Transmit Data, Output) DTR (Data Terminal Ready, Input) GND (Ground) DSR (Data Set Ready, Input) RTS (Request To Send, Output) CTS (Clear To Send, Input)

  • Page 36: Table Of Contents

    CONTENTS INSTALLATION AND SETUP ........................1 SLOT0 CONFIGURATION ..........................1 NON-SLOT0 CONFIGURATION........................2 LOGICAL ADDRESS ............................3 CLK10 SIGNAL GENERATION ........................4 INSTALLATION ............................... 5 VXIBUS CONFIGURATION REGISTERS AND OPERATIONAL REGISTERS ......... 6 ID/LOGICAL ADDRESS REGISTER ......................6 DEVICE TYPE REGISTER ..........................7 STATUS/CONTROL REGISTER ........................
  • Page 37 Model V152...

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