Kenwood TH-22A Service Manual page 9

TH-22A/AT/E
CIRCUIT DESCRIPTION
PLL CIRCUIT
e PLL
The output from the 12.8 MHz reference oscillator consist-
ing of X1 is divided by IC1 to produce a 5 kHz or 6.25 kHz
reference frequency. The comparison frequency is obiained
by amplifying the VCO output by Q2 and dividing it by the
PLL IC (1C1).
5, 10, 12.5, 15, 20, and 25kHz PLL synthesizer is imple-
mented by phase-comparing the reference frequency and
comparison frequency obtained when X71 is divided.
The pulse output from pins 18 and 20 of IC1 according to
the difference between the reference frequency and the
comparison frequency is passed through the charge pump,
and is changed to DC current by a low-pass filter to produce
the lock voltage.
The power supply of the charge pump is raised from 3M
by the DC-DC converter to increase the lock voltage to about
7V.
e VCO (X58-4090-00)
The desired frequency is directly produced by the Colpitts
oscillator configured around FET Q2. The lock voltage is
applied to varicap diodes D1 and D2 to change the oscillator
frequency. The TX pin is made "L" during transmission. Q1
and D4 are then turned off to change over the oscillation
frequency.
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Fig. 7 PLL and VCO circuits
* Unlock detection circuit , 3C.
When the PLL is in the unlock state, the pulse that is ict ®
output to the UL pin (pin 8) of [C1 is waveform shaped by D3, 3 03 = JT LoL
C9, R11, and C8. The UL pin is then made high. The voltage UL vf y-COM
at the UL pin is monitored by the microprocessor to control ET 3}
the transmission or reception selection timing. i) I
Fig. 8 Unlock detection circuit