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TAS5711
PIN ASSIGNMENT
GVDD_OUT
PLL_FLTM
PLL_FLTP
PIN
TYPE
NAME
NO.
AGND
30
A_SEL
14
AVDD
13
AVSS
9
BST_A
4
BST_B
43
BST_C
42
BST_D
33
DVDD
27
DVSSO
17
(1) TYPE: A = analog; D = 3.3-V digital; P = power/ground/decoupling; I = input; O = output
(2) All pullups are weak pullups and all pulldowns are weak pulldowns. The pullups and pulldowns are included to assure proper input logic
levels if the pins are left unconnected (pullups → logic 1 input; pulldowns → logic 0 input).
48 47 46 45 44 43 42 41 40 39 38 37
OUT_A
1
PVDD_A
2
PVDD_A
3
BST_A
4
5
SSTIMER
6
OC_ADJ
7
PBTL
8
AVSS
9
10
11
VR_ANA
12
13 14 15 16 17 18 19 20 21 22 23 24
5-V
(1)
TERMINATION
TOLERANT
P
DIO
P
P
P
P
P
P
P
P
PHP Package
(Top View)
TAS5711
PIN FUNCTIONS
(2)
Analog ground for power stage
A value of 0 (15-kΩ pulldown) makes the I
and a value of 1 (15-kΩ pullup) makes it 0x36. This pin can be
programmed after RESET to be an output by writing 1 to bit 0 of I
register 0x05. In that mode, the A_SEL pin is redefined as FAULT
(see
ERROR REPORTING
3.3-V analog power supply
Analog 3.3-V supply ground
High-side bootstrap supply for half-bridge A
High-side bootstrap supply for half-bridge B
High-side bootstrap supply for half-bridge C
High-side bootstrap supply for half-bridge D
3.3-V digital power supply
Oscillator ground
OUT_D
36
PVDD_D
35
PVDD_D
34
BST_D
33
GVDD_OUT
32
VREG
31
30
AGND
29
GND
28
DVSS
27
DVDD
26
STEST
25
RESET
P0075-08
DESCRIPTION
2
C device address 0x34,
for details).
2
C
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