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Sony STR-DA1000ES Technical Background page 9

Es series receivers
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Even if the amplitude of every digital sample is 100% accurate, time-
axis jitter can distort the analog result (top). Sony's Clean Data Cycle
actually calculates the original sampling interval and applies the
calculated timing to the signal (bottom).
Using a supremely accurate clock, the Clean Data Cycle examines
thousands of input pulses at a time, calculates the correct sampling interval and
applies the clean interval to the output data. In this way, jitter is completely
eliminated—and the integrity of the original musical signal is restored.
After the digital signal is stabilized by the Clean Data Cycle, S-Master Pro
converts it to Complementary Pulse Length Modulation (C-PLM)—an original
Sony technology. Previous digital amplifiers have used a 1-bit technology called
Pulse Width Modulation or PWM. That is to say, those digital amplifiers varied
the width of pulses. Unfortunately, PWM tends to expose the signal to second-
order harmonic distortion. C-PLM effectively controls the distortion, maintaining
the integrity of the musical signal.
Synchronous Time Accuracy Controller (S-TACT)
Because C-PLM conversion expresses the music in a different digital
form, the signal requires another round of correction for time-base errors. For
this purpose, Sony incorporates the Synchronous Time Accuracy Controller (S-
TACT) circuitry we developed for the SCD-1 Super Audio CD player. S-TACT
effectively clears pulse generator jitter by referencing the output directly to the
master clock. This establishes extremely accurate pulse timing for amazingly low
distortion.
ES Receivers V3.0
Low-distortion C-PLM
Page 9

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