Aim AMCX429 Hardware Manual
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Aim AMCX429 Hardware Manual

4/8/16/32 channel arinc429 pmc interface module
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AMCX429
4/8/16/32 Channel ARINC429
PMC Interface Module
Hardware
Manual
V01.13 Rev. A
February 2019

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  • Page 1 AMCX429 4/8/16/32 Channel ARINC429 PMC Interface Module Hardware Manual V01.13 Rev. A February 2019...
  • Page 3 AMCX429 ARINC429 Test and Simulation Module With 4/8/16/32 channels PMC Interface Modules Hardware Manual V01.13 Rev. A February 2019 AIM No. 60-12A3x-16-0113-A 60-12A5x-16-0113-A AMCX429 Hardware Manual...
  • Page 4 Notice: The information that is provided in this document is believed to be accurate. No responsibility is assumed by AIM GmbH for its use. No license or rights are granted by implication in connection therewith. Specifications are subject to change without notice.
  • Page 5 All characteristics are equal to the standard version unless otherwise stated V01.10 Rev. B 13.05.2014 M. Lamp Wrong AIM USA Tel. No. V01.11 Rev. A 19.08.2015 B. Schweitzer Modify Transmitter Technical Data V01.12 Rev. A 13.01.2017 M. Lamp/ New Layout, Discrete IO description, S.
  • Page 6 THIS PAGE IS INTENTIONALLY LEFT BLANK AMCX429 Hardware Manual...

  • Page 7: Table Of Contents

    Preparation and Precaution for Installation ................5 Installation Instructions ......................5 Connecting to Other Devices ....................8 2.3.1 AMCX429-4/8/16 Front panel Connector Pinout ..............9 2.3.2 AMCX429-32 Front panel Connector Pinout .................10 Structure of the AMCX429 ................... 11 PCI bus and BIU-I/O FPGA ......................12 3.1.1...
  • Page 8 Title Page Figure 2-1: Installing an AMCX429 Mezzanine Module ..........6 Figure 2-2: Installing a Conduction Cooled AMCX429-n-CC Mezzanine Module ..7 Figure 2-3: Front Connector Pin Orientation ............... 8 Figure 3-1: Block Diagram of AMCX429 ..............11 Figure 3-2: GPI/O AMCX429-x circuitry ..............14 Figure 3-3: GPIO Protection with external resistor ............15...

  • Page 9: Introduction

    Due to desiderate amount of IO pins, the IRIG Input and Output on AMCX429-32 variant is only available on Front-IO. The Trigger feature is limited to only one Trigger Output line on Front panel Connector on AMCX429-32.

  • Page 10: How This Manual Is Organized

    This feature expands the capability of the AMCX429 module to that of a high level instrument. To fulfil the real-time requirements of a typical avionic type data bus system, a high performance 32bit RISC processor (BIP) is implemented.

  • Page 11: Industry Documents

    1.3.1 Industry Documents PCI LOCAL BUS Specification, Revision 3.0 1.3.2 Product Specific Documents AIM - Reference Manual AMCX429 Application Interface Library Detailed description of the programming interface between the Host Carrier board and the on-board driver software. AMCX429 Hardware Manual...
  • Page 12 1. Introduction THIS PAGE IS INTENTIONALLY LEFT BLANK AMCX429 Hardware Manual...

  • Page 13: Installation

    2 INSTALLATION 2.1 Preparation and Precaution for Installation The AMCX429 features PCI 32bit / 66MHz bus, therefore, there are no jumpers or switches on the board that require modification by the user in order to interface to the PCI bus.
  • Page 14 Remove the carrier board from the system slot. Place the AMCX429-n-CC mezzanine module on top of the carrier board, with the PMC connectors on the AMCX429-n-CC aligned with the corresponding connectors on the carrier board (see Figure 2-2: Installing a Conduction Cooled AMCX429-n-CC Mezzanine Module).

  • Page 15: Figure 2-2: Installing A Conduction Cooled Amcx429-N-Cc Mezzanine Module

    2. Installation Figure 2-2: Installing a Conduction Cooled AMCX429-n-CC Mezzanine Module AMCX429 Hardware Manual...

  • Page 16: Connecting To Other Devices

    2. Installation 2.3 Connecting to Other Devices The front panel connector for the AMCX429 is a standard 68-pin female SCSI connector. Each Transmit and Receive Channel shares their pins. The front connector is only available on the non-CC version. Rear IO Pinning is available in the appendix chapter.

  • Page 17: Amcx429-4/8/16 Front Panel Connector Pinout

    2. Installation 2.3.1 AMCX429-4/8/16 Front panel Connector Pinout Signal Direction Pin No. Signal Direction Type Type TxRx_True_1 Bidir. TxRx_Comp_1 Bidir. TxRx_True_2 Bidir. TxRx_Comp_2 Bidir. TxRx_True_3 Bidir. TxRx_Comp_3 Bidir. TxRx_True_4 Bidir. TxRx_Comp_4 Bidir. TxRx_True_5 Bidir. TxRx_Comp_5 Bidir. TxRx_True_6 Bidir. TxRx_Comp_6 Bidir.

  • Page 18: Amcx429-32 Front Panel Connector Pinout

    2. Installation 2.3.2 AMCX429-32 Front panel Connector Pinout Signal Direction Pin No. Signal Direction Type Type TxRx_True_1 Bidir. TxRx_Comp_1 Bidir. TxRx_True_2 Bidir. TxRx_Comp_2 Bidir. TxRx_True_3 Bidir. TxRx_Comp_3 Bidir. TxRx_True_4 Bidir. TxRx_Comp_4 Bidir. TxRx_True_5 Bidir. TxRx_Comp_5 Bidir. TxRx_True_6 Bidir. TxRx_Comp_6 Bidir.

  • Page 19: Structure Of The Amcx429

    3. Structure of the AMCX429 3 STRUCTURE OF THE AMCX429 The structure of the AMCX429 PCI-Express is shown in Figure 3-1. The AMCX429 comprises the following main sections:  PCI bus and BIU-IO FPGA  Global RAM  BIU Processor Section ...

  • Page 20: Pci Bus And Biu-I/O Fpga

    3. Structure of the AMCX429 3.1 PCI bus and BIU-I/O FPGA The new common FPGA architecture of AIM’s new family of PCI Express based Mezzanine modules includes both the complete PCI Express bus logic and the BIU processor logic. The PCI interface connects to a transparent PCIe-to-PCI bridge which realizes a 32-bit and 66MHz capable PCI upstream port.

  • Page 21: Arinc-429 Encoder

    (if no special transmission mode is chosen) 3.6 External Trigger Inputs and Outputs One Trigger input and one Trigger output is provided for all AMCX429 variants The Trigger I/Os are TTL level compatible. Filter circuitry is provided at the trigger inputs and outputs to cover Electromagnetic Compatibility (EMC) aspects.

  • Page 22: User Programmable Discrete I/Os

    3. Structure of the AMCX429 3.7 User Programmable Discrete I/Os Due to desiderate amount of IO Pins, the Discrete-IO are only provided on AMCX429-4/- 8/-16, not on AMCX429-32. Discrete input signals are always enabled whereas the discrete output must be enabled by the user.

  • Page 23: Figure 3-3: Gpio Protection With External Resistor

    3. Structure of the AMCX429 Beware that a series resistor must be provided when a user voltage is used (Figure 3-3: GPIO Protection with external resistor). This serial resistor must limit the current through the open collector transistor to max. 50mA. Otherwise the open collector transistor can be damaged.

  • Page 24: Irig- And Time Code Section

    The generated time code signal is an IRIG-B compatible sinusoidal waveform. The time code information can be used for time-tagging and multi-channel synchronization. On the AMCX429 a new generation IRIG-B section is implemented with a free wheeling IRIG functionality. If no external IRIG signal is detected, the TCP switches automatically to the free wheeling mode.

  • Page 25: Technical Data

    (assuming input signal accuracy better than 50ppm) Encoder Format: IRIG-B-122 Absolute Accuracy ±25ppm (standard Oscillator) Signal Waveform: Amplitude modulated sine wave Output Amplitude: ~ 4,5Vpp, High voltage level Modulation Ratio: ~ 3:1 Output Impedance ~ 51Ω Carrier Frequency 1kHz +/-50ppm AMCX429 Hardware Manual...
  • Page 26 Trigger IN TTL compatible Input Level, 1KΩ series resistor and fast ESD protection. Rising Edge sensitive, required pulse width >75ns Trigger OUT Output with TTL Level, series resistor of 82Ω and fast ESD protection Output-Strobe pulse width: 500ns, Imax=8mA AMCX429 Hardware Manual...
  • Page 27 (3) Low Speed 12,5 kHz; worst case load (400 Ohm || 30nF); 100 % Duty Cycle (4) from Module Version equal or greater V02.00, the +5V Power Supply is used and requires max. 0,25W @all operation conditions Dimensions 111,15 x 167,65mm for the AMCX429-xx 111,15 x 143,75mm for the AMCX429-xx-CC Weight...
  • Page 28 4. Technical Data THIS PAGE IS INTENTIONALLY LEFT BLANK AMCX429 Hardware Manual...

  • Page 29: Appendix

    5. Appendix 5 APPENDIX 5.1 Front Connector (Ordering Information) To adapt the AMCX429 Front-IO Signals, a 68-pin SCSI male connector must be used. Manufacturer and part number for a male connector with flat ribbon cable: Connector: Harting, P/N 60030685210 Case:...

  • Page 30: Rear Io Pin Assignment Pmc Connectors

    Bidir. TxRx_True_13 Bidir. TxRx_Comp_21 Bidir. TxRx_Comp_13 Bidir. TxRx_True_22 Bidir. TxRx_True_14 Bidir. TxRx_Comp_22 Bidir. TxRx_Comp_14 Bidir. TxRx_True_23 Bidir. TxRx_True_15 Bidir. TxRx_Comp_23 Bidir. TxRx_Comp_15 Bidir. TxRx_True_24 Bidir. TxRx_True_16 Bidir. TxRx_Comp_24 Bidir. TxRx_Comp_16 Bidir. Table 5-1: Rear I/O Connector AMCX429-32 AMCX429 Hardware Manual...

  • Page 31: Table 5-2: Rear I/O Connector Amcx429-4/8/16

    Bidir. Discret_IN_7 TxRx_True_13 Bidir. Discret_IN_8 TxRx_Comp_13 Bidir. Discret_OUT_1 TxRx_True_14 Bidir. Discret_OUT_2 TxRx_Comp_14 Bidir. Discret_OUT_3 TxRx_True_15 Bidir. Discret_OUT_4 TxRx_Comp_15 Bidir. Discret_OUT_5 TxRx_True_16 Bidir. Discret_OUT_6 TxRx_Comp_16 Bidir. Discret_OUT_7 Discret_OUT_8 TxRx_True_1 Bidir. TxRx_Comp_1 Bidir. Table 5-2: Rear I/O Connector AMCX429-4/8/16 AMCX429 Hardware Manual...

  • Page 32: Certificate Of Volatility

    All operating Data for handling the I/O Protocol will be stored in volatile memory only. No Transfer data is stored in Non-Volatile Memory. The Non-Volatile Memory only contains production relevant data for board personalisation, FPGA Logic or Firmware Code for the on board Microcontroller. AMCX429 Hardware Manual...

  • Page 33: Notes

    Small Form-factor Pluggable SO-DIMM Small Outline Dual Inline Memory Module Surface Mounted Device System on a Chip SRAM Static Random Access Memory SSRAM Synchronous Static Random Access Memory Time Code Processor Transmit UART Universal Asynchronous Receiver and Transmitter AMCX429 Hardware Manual...

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