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Preface Purpose This manual describes the design and operational features of the PMC551 PCI DRAM Memory Module as well as installation procedures for attaching the card onto a host Single Board Computer (SBC). Notice The information in this manual has been carefully reviewed and is believed to be entirely accurate.
PMC551 PCI Mezzanine Card (PMC). The PMC551 provides a high performance memory subsystem on the PCI I/O bus. The PMC551 memory will respond with low bus overhead and high determinism. These features can be critical in high performance data acquisition systems.
If the container is damaged, request that the carrier’s agent be present during unpacking and inspection of the unit. Unpack the PMC551 module from shipping carton. Check and verify that all items are present by referring to the packing list.
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Remove the four screws from bottom of the stand-offs of the PMC551 Line-up the J1 & J2 on the host PCB to PMC551, J1 & J2 Push the PMC551 down (make sure the connectors J1 and J2 are positioned properly).
Front Panel Indicators PMC551 PMC551 Front Panel Rx-URME-031 Rev - - DRAFT - PMC551 Hardware Reference and Installation Manual Page 6...
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4.1.2 PCI Interface The PCI interface on the PMC551 is fully compliant with the PCI 2.1 specification. For data transfer (i.e., access to the memory system), it responds to all PCI READ and WRITE transactions. Configuration and setup is performed using PCI Configuration cycles.
The full set of PCI configuration registers is included in the PCI header, but only a subset are relevant to the operation of the PMC551. As it is only a PCI target, none of the bus master registers will be effective (e.g., Latency Timer). In the following tables registers are presented as 32 bit values;...
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Parity Error. Set to 1 in response to parity error. Write 1 to clear 5.1.2 BAR0 BAR0 is used to determine the size of the memory actually on the PMC551 in the system, and to assign the base PCI address of the region that the PMC551 will occupy. Bit(s)
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