JVC RX-6032VSL Service Manual page 21

4.13 LP61L1024S-12-X (IC641) : SRAM
• Pin layout
1
NC
2
A16
3
A14
4
A12
5
A7
6
A6
7
A5
8
A4
9
A3
10
A2
11
A1
12
A0
13
I/O1
14
I/O2
15
I/O3
16
Vss
V
32
DD
A15
31
CS2
30
WE
29
A13
28
A8
27
26 A9
25 A11
24 OE
23 A10
22 CS1
I/O8
21
I/O7
20
I/O6
19
I/O5
18
I/O4
17
• Block diagram
V
DD
Vss
A0
DECODER
A16
CS2
CS1
CONTROL
OE
WE
• Pin function
SYMBOL DESCRIPTION
A0 - A16 Address Input
I/O1 - I/O8 Data Input/Output
CS1, CS2 Chip Select Inputs
WE Write Enable Input
OE Output Enable Input
VDD Power Supply
Vss Ground
NC No Connection
RX-6032VSL
CORE
ARRAY
I/O1
DATA I/O
I/O8
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