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Section 11
Testing functionality by secondary injection
•
•
•
2.
Activate RESETCOMP input to ensure that the stored values are reset.
3.
The expected output is monitored in the following path from the local HMI client: Main menu /
Test/Function status /Unbalance protection/CapBankPhaseVoltageDiff(87V, Ud>)/
SCPDPTOV(87V, Ud>):x/Outputs , where x = instance number.
4.
check the respective operation of warning, alarm, and trip.
Step no.
4-a*
4-b
4-c
4-d
4-e **
4-f
4-g
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214
UdifWrn> =5% UB
UMin> =50% UB
VoltRatioL1 =0.5
Changes after step 2
Inject constant bus voltages of U
U
= 60 V at 240°, and U
L2
secondary at rated frequency
Inject constant tap voltage of U
secondary at rated frequency
Activate binary input RESETCOMP for 1 s
Inject U
= 28.17 V in secondary at rated
TapL1
frequency
Activate binary input TRIGCOMP for 1 s
Inject U
= 29.50 V in secondary at rated
TapL1
frequency
Inject U
= 30.20 V in secondary at rated
TapL1
frequency
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Expected output
= 60 V at 0°,
•
L1
= 60 V at 100° in
L3
•
= 30 V in
UTAPL1 should show 109.09 kV
TapL1
RESETCOMP Test
USEDURATL1 should show 0.5 (VoltRatioL1)
TRIGCOMP Test
Repeat
Sub-step 4–a
•
•
•
•
•
WARNING Signal Test
•
•
ALARM Signal Test
Repeat
Sub-step 4–a
and
Sub-step 4–b
•
•
TRIP Signal Test
Repeat
Sub-step 4–a
and
Sub-step 4–b
1MRK 504 165-UEN Rev. K
UL1, UL2, and UL3 should show 218.18
kV
UNSCB should show 6.94kV
DIFURATL1 should become HIGH
URATIOL1 and USEDURATL1 should
show 0.4 and 0.5 respectively
The output COMPEXED should become
HIGH for 100 ms and LASTCOMP output
should display the date and time of
compensation
URATIOL1 and USEDURATL1 should
show 0.4
DIFURATL1 should become LOW
WARNING and WRNL1 signals should
become HIGH after a time delay given by
the setting tDefWrn
PUDIFL1 should show 5.28 %
ALARM and ALML1 signals should
become HIGH after a time delay given by
the setting tDefAlm
PUDIFL1 should show 8.06%
Transformer protection RET670
Commissioning manual
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