Related Manuals for Aim AMCX-PSI-16
Summary of Contents for Aim AMCX-PSI-16
- Page 1 AMCX-PSI-16 16 Channels PANAVIA PCI Mezzanine Card Module for PMC Hardware Manual V01.00 Rev. A October 2017...
- Page 3 AMCX-PSI-16 16 Channels PANAVIA PCI Mezzanine Card Module for PMC Hardware Manual V01.00 Rev. A October 2017 AIM No. 60-14A30-16-0100-A AMCX-PSI-16 Hardware Manual...
- Page 4 Notice: The information that is provided in this document is believed to be accurate. No responsibility is assumed by AIM GmbH for its use. No license or rights are granted by implication in connection therewith. Specifications are subject to change without notice.
- Page 5 DOCUMENT HISTORY The following table defines the history of this document. Version Cover Date Created by Description 01.00 Rev A 26.10.2017 E. Carraro First Release AMCX-PSI-16 Hardware Manual...
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Page 7: Table Of Contents
Front Panel Connector Pin-out ................ 5 2.3.2. PMC Connector P11/P12 ................6 2.4. Onboard LEDs ....................10 STRUCTURE OF THE AMCX-PSI-16 ..............7 3.1. PCI Express Interface and BIU-I/O FPGA ............8 3.1.1. Global RAM Interface and Arbitration .............. 8 3.1.2. - Page 8 LIST OF FIGURES Figure Title Page Figure 2-1 Installing an Air Cooled AMCX-PSI-16 Mezzanine Module ........4 Figure 2-2 SCSI-3 68 pin Hi-D-SUB Female Connector ............4 Figure 2-3: LEDs positioning on the board................11 Figure 3-1: AMCX-PSI-16 Internal Structure ................7...
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Page 9: Introduction
Array (FPGA). This FPGA supports both, the interface to the application and driver software tasks running on the host computer and assists the communication for data transfer. This feature expands the capability of the AMCX-PSI-16 module to that of a high level instrument. -
Page 10: How This Manual Is Organized
Section 2 - Installation - describes the steps required to install the AMCX-PSI- 16 device, and connect the device to other external interfaces c. Section 3 - Structure of AMCX-PSI-16 - describes the physical hardware interfaces on the card using a block diagram and a description of each main component d. -
Page 11: Installation
2.1. Preparation and Precaution for Installation The AMCX-PSI-16 features a 32 PCI bus capability on the PMC connectors, therefore, there are no jumpers or switches on the board that require modification by the user in order to interface to the host bus. -
Page 12: Connecting To Other Devices
Figure 2-1 Installing an Air Cooled AMCX-PSI-16 Mezzanine Module 2.3. Connecting to other Devices The external interface of the AMCX-PSI-16 consists of up to up to 8 Transmit and 8 Receive PANAVIA channels as well as the IRIG IN interface for multi-channel time tag synchronization. -
Page 13: Front Panel Connector Pin-Out
CH8_DAT _RX_T CH8_DAT _RX_C CH8_DAT _TX_T CH8_DAT _TX_C CH7_CLK _RX_T CH7_CLK _RX_C Power TRIGGER_OUT IRIG_IN IRIG_OUT CH5_CLK_RX_T CH5_CLK_RX_C CH5_CLK_TX_T CH5_CLK_TX_C CH6_CLK _RX_T CH6_CLK _RX_C CH6_CLK _TX_T CH6_CLK _TX_C CH8_CLK _TX_T CH8_CLK _TX_C Table 2.1: Fornt Panel Connector Pinout AMCX-PSI-16 Hardware Manual... -
Page 14: Pmc Connector P11/P12
PCIAD15 PCIAD14 PCIAD13 PCIAD12 PCIAD11 PCI_M66EN PCIAD10 PCIAD9 PCIAD8 +3.3V PCI_CBE0# PCIAD7 Reserved PCIAD6 PCIAD5 +3.3V Reserved PCIAD4 Reserved PCIAD3 Reserved Reserved PCIAD2 PCIAD1 Reserved PCIAD0 Reserved +3.3V Reserved Reserved Table 2.2: Pin Assignment of PMC connector AMCX-PSI-16 Hardware Manual... -
Page 15: Structure Of The Amcx-Psi-16
AMCX-PSI-16 3. Structure 3. STRUCTURE OF THE AMCX-PSI-16 The structure of the AMCX-PSI-16 mezzanine card is shown in the block diagram here below: SCSI-3 68 pin Hi-D-SUB Female Connector 8RX (8 Data +8 8TX (8 Data +8 Clock) PANAVIA... -
Page 16: Pci Express Interface And Biu-Io Fpga
3.1. PCI Express Interface and BIU-I/O FPGA The new common FPGA architecture of AIM’s new family of PCI Express based Mezzanine modules includes both the complete PCI Express bus logic and the BIU processor logic. The PCI Express interface connects to a transparent PCIe-to-PCI bridge which realizes a 32-bit and 66MHz capable PCI upstream port. -
Page 17: Biu-Processor (Bip)
The generated time code signal is an IRIG B compatible signal. The time code information can be used for time-tagging and multi-channel synchronization. On the AMCX-PSI-16 a new generation of the IRIG section is implemented with a free-wheeling IRIG functionality. If no external IRIG signal is detected, the TCP switches automatically to the free-wheeling operation mode. -
Page 18: Onboard Leds
3.12. Onboard LEDs The AMCX-PSI-16 card mounts 7x LEDs with different colors which are used to give a visual feedback to the user during debug. Since the card is a PMC mezzanine card and the LEDs are placed on the bottom side and not on the fron t panel, any visual indication is available if the user is placed in line of sigth with the bottom side of the card. -
Page 19: Figure 2-3: Leds Positioning On The Board
AMCX-PSI-16 3. Structure Figure 3-2: LEDs positioning on the board The following drawing shows the LED state diagram for the PANAVIA Receiver Error and Receiver Busy LED's. Please note that this state diagram is implemented on each receive channel and that the results of all channels after a logical 'OR' are used as LED driving signal. - Page 20 AMCX-PSI-16 3. Structure THIS PAGE INTENTIONALLY LEFT BLANK AMCX-PSI-16 Hardware Manual...
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Page 21: Technical Data
For absolute time tagging, a special time code processor implements an IRIG-B encoder/decoder. If no external IRIG-B source is available a time code in IRIG B format is generated and can be used to synchronize multiple boards or modules. AMCX-PSI-16 Hardware Manual... - Page 22 Lock time: < 5s Free-wheeling accuracy after 10 Minutes < 1ppm (assuming input signal accuracy better than 50ppm) IRIG Encoder: Format: AIM Standard (based on IRIG B format) Signal Waveform: Amplitude modulated sine wave Abs Accuracy: +/-25ppm (standard Oscillator) Output Amplitude: ~ 4.5 V...
- Page 23 : 100% Bus Load means: 8 channels transmitting at 64KHz and 8 channels receiving at 64KHz Temperature: 0°C to +70°C Standard Operating -40°C to +85°C Extended Temperature on request -55°C to +120°C Storage Temperature Humidity: 0% to 95% non-condensing Conformal Coating available on Request AMCX-PSI-16 Hardware Manual...
- Page 24 Technical Data THIS PAGE INTENTIONALLY LEFT BLANK AMCX-PSI-16 Hardware Manual...
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Page 25: Notes
RS232 Hardware Interface Protocols RTPTP Remote Terminal Production Test Plan Surface Mounted Device SRAM Static Random Access Memory SSRAM Synchronous Static Random Access Memory Time Code Processor UART Universal Asynchronous Receiver and Transmitter PCI Express Mezzanine Card AMCX-PSI-16 Hardware Manual... - Page 26 Notes THIS PAGE INTENTIONALLY LEFT BLANK AMCX-PSI-16 Hardware Manual...
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Page 27: Appendix
All operating Data for handling the I/O Protocol will be stored in volatile memory only. No Transfer data is stored in Non-Volatile Memory. The Non-Volatile Memory only contains production relevant data for board personalisation, FPGA Logic or Firmware Code for the on board Microcontroller. AMCX-PSI-16 Hardware Manual...
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