National Instruments VXIpc 800 Series Getting Started page 38

C
CLK10
CMOS
Commander
configuration registers
D
Data Transfer Bus
DMA
DRAM
driver window
DTB
E
ECL
EEPROM
© National Instruments Corporation
A 10 MHz, ±100 ppm, individually buffered (to each module slot),
differential ECL system clock that is sourced from Slot 0 of a VXIbus
mainframe and distributed to Slots 1 through 12 on P2. It is distributed
to each slot as a single-source, single-destination signal with a matched
delay of under 8 ns.
Complementary Metal Oxide Semiconductor; a process used in making
chips
A message-based device that is also a bus master and can control one or
more Servants
A set of registers through which the system can identify a module
device type, model, manufacturer, address space, and memory
requirements. In order to support automatic system and memory
configuration, the VXIbus specification requires that all VXIbus
devices have a set of such registers.
DTB; one of four buses on the VMEbus backplane. The DTB is used by
a bus master to transfer binary data between itself and a slave device.
Direct Memory Access; a method by which data is transferred between
devices and internal memory without intervention of the central
processing unit
Dynamic RAM (Random Access Memory); storage that the computer
must refresh at frequent intervals
A region of address space that is decoded by the VXIpc 800/700 for use
by the NI-VXI software
See Data Transfer Bus.
Emitter-Coupled Logic
Electronically Erasable Programmable Read Only Memory
G-3 Getting Started with Your VXIpc 800/700
Glossary