Power Supply & Reset - KaRo QS Series Manual

QS8M
QS
PIN
STANDARD
32 ENET_TXD3 ENET_TD3
33 ENET_TXD2 ENET_TD2
34 ENET_TXD1 ENET_TD1
35 ENET_TXD0 ENET_TD0
SD
36 SD_CD SD2_CD_B
37 SD_D1 SD2_DATA1
38 SD_D0 SD2_DATA0
39 SD_CLK SD2_CLK
40 SD_CMD SD2_CMD
41 SD_D3 SD2_DATA3
42 SD_D2 SD2_DATA2
USB
USBH_VBUS USB2_VBUS
43
USBH_DN USB2_DN
44
USBH_DP USB2_DP
45
46 USBOTG_VBUS USB1_VBUS
47 USBOTG_DN USB1_DN
48 USBOTG_DP USB1_DP
POWER SUPPLY & RESET
49
VIN
50
51 #POR
52 BOOT_MODE
MIPI-CSI
53 LCD_DE MIPI_CSI_DATA3_P
54 LCD_VSYNC MIPI_CSI_DATA3_N
55 LCD_HSYNC MIPI_CSI_DATA2_P
56 LCD_CLK MIPI_CSI_DATA2_N
57 LCD_R1 MIPI_CSI_DATA1_P
58 LCD_R2 MIPI_CSI_DATA1_N
59 LCD_R3 MIPI_CSI_DATA0_P
60 LCD_R4 MIPI_CSI_DATA0_N
Ka-Ro electronics GmbH - Pascalstr. 22, D-52076 Aachen, Germany - Tel.: +49 2408 1402-0 (FAX -10)
i.MX8M Pad Name
OUTPUT=CCM_ENET_REF_C
POR_B
www.karo-electronics.de
Alternate functions GPIO
ENET1_RGMII_TD3 GPIO1[18] Only used for RGMII
ENET1_RGMII_TD2
INPUT=ENET1_TX_CLK
GPIO1[19]
LK_ROOT
ENET1_RGMII_TD1 GPIO1[20] RMII and RGMII.TD1
ENET1_RGMII_TD0 GPIO1[21] RMII and RGMII.TD0
USDHC2_CD_B GPIO2[12]
USDHC2_DATA1 GPIO2[16]
USDHC2_DATA0 GPIO2[15]
USDHC2_CLK GPIO2[13]
USDHC2_CMD GPIO2[14]
USDHC2_DATA3 GPIO2[18]
USDHC2_DATA2 GPIO2[17]
i.MX8M Nano: Not connected
i.MX8M Nano: Not connected
i.MX8M Nano: Not connected
10K-PU to
1V8
Description (refer to i.MX8M manuals for details)
Used as RMII clock and RGMII data, there are two RGMII clock
schemes.
• MAC generate output 50M reference clock for PHY,
and MAC also use this 50M clock.
• MAC use external 50M clock.
3.3V Module power supply input.
Power On Reset — 1.8V active low input / open drain output
signal.
Also connected to PMIC RESETO. Leave unconnected, if not
used.
Boot mode select L: Boot from eMMC / H: Boot from UART/USB