Summary of Contents for SpinCore Technologies PulseBlasterESR-PRO SP18A
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PulseBlasterESR-PRO™ (PCI Board SP18A) (USB Enclosure System SP47, SP51) (Rackmount Front Panel SP51) (PCIe Board SP49, SP56) Owner’s Manual SpinCore Technologies, Inc. http://www.spincore.com...
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All other trademarks are the property of their respective owners. SpinCore Technologies, Inc. makes every effort to verify the correct operation of the equipment. This equipment version is not intended for use in a system in which the failure of a SpinCore device will threaten the safety of equipment or person(s).
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PulseBlasterESR-PRO SMA Connector EXT_CLK ..........................22 Connector Information for 2U BNC Rackmount Enclosure and Rackmount Front Panel . 22 Connectors for 2U BNC Rackmount Enclosure and Rackmount Front Panel ..22 DB9 Connector (Trig/Res/Stat) for 2U BNC Rackmount Enclosure and Rackmount Front Panel ......................
PulseBlasterESR-PRO I. Introduction Product Overview The PulseBlasterESR-PRO™ is a high-speed, intelligent pulse/pattern/delay generator designed for outputting precisely timed TTL patterns. The intelligence of the PulseBlasterESR-PRO comes from an embedded microprogrammed controller core nicknamed the PulseBlaster™. The controller is able to execute instructions that allow it to control program flow much like a general purpose microcontroller.
PulseBlasterESR-PRO Board Architecture Block Diagram Figure 1 presents the general architecture of the PulseBlasterESR-PRO system. The major building blocks are the SRAM memory, the PulseBlaster core, the integrated bus controller (IBC), the counter, and the output buffers. The entire logic design, including the SRAM memory and output buffers, is contained on a single silicon chip, making it a System-on-a-Chip design.
PulseBlasterESR-PRO Timing Characteristics The PulseBlaster core's timing controller accepts an external (on-board) crystal oscillator of 50 MHz. The input frequency is internally multiplied. The PulseBlasterESR-PRO is available with 500 MHz internal clock frequency. The innovative architecture of the timing controller allows the processing of either simple timing instructions (with delays of up to 2 clock cycles or 8.59 s at 500 MHz), or double-length timing instructions (up to 2...
PulseBlasterESR-PRO Specifications TTL Specifications 21 individually controlled digital output lines (LVTTL levels, 3.3 V logical “one” unterminated) 4 bracket mounted BNC connectors, impedance matched to 50 ohm, for board 24 BNC connectors for rackmount system and rackmount front panel, 21 of which are individually controlled output channels ...
Install the latest version of SpinAPI found at: http://www.spincore.com/support/spinapi/ . SpinAPI is a custom Application Programming Interface developed by SpinCore Technologies, • Inc. for use with the PulseBlasterESR-PRO and most of SpinCore's other products. It can be utilized using C/C++ or graphically using the options in the next section below. The API will also install the necessary drivers.
PulseBlasterESR-PRO III. Programming the PulseBlasterESR-PRO SpinCore Technologies Inc. is dedicated to providing an easy and efficient method of programming your board. Various control methods available are detailed below, making PulseBlaster products flexible for any number of applications. Special consideration of the ESR-PRO Short Pulse feature must be taken when programming or operating this board.
PulseBlasterESR-PRO The PulseBlaster Interpreter is available as part of the SpinCore driver suite, and will be automatically installed during the setup process (setup process is described in Section II. Installation). For convenience, a shortcut to the PulseBlaster Interpreter will be added to your desktop. For more information on programming using the PulseBlaster Interpreter, see the manual located at http://www.spincore.com/support/SPBI/Doc/.
PulseBlasterESR-PRO There are two versions of the LabVIEW extensions available free of charge on our website. The first is for those who do not have LabVIEW or who are not familiar with LabVIEW programming. This option is a stand-alone GUI (see Figure 3 above) that comes in executable form and utilizes the LabVIEW runtime environment.
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PulseBlasterESR-PRO Making changes to an example program requires understanding of only a few lines of code. The following C code example generates a 50% duty cycle square wave with a 400.0 ms period. pb_init(); /*Initialize communication with the board*/ pb_core_clock (CLOCK); /*Set the internal clock frequency value – this will be either 250, 300, 400, or 500 MHz depending on your product */ /*Start programming the Pulse Program*/...
PulseBlasterESR-PRO Using C Functions to Program the PulseBlasterESR-PRO A series of functions have been written to control the board and facilitate the construction of pulse program instructions. It should be noted that the pb_inst C function accepts any delay value greater than 10 ns.
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PulseBlasterESR-PRO int pb_inst(int flags, int inst, int inst_data, double length); Used to send one instruction of the pulse program. Should only be called after pb_start_programming(PULSE_PROGRAM) has been called. It returns a negative number on an error, or the instruction number upon success. If the function returns –99, an invalid parameter was passed to the function.
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#define CLOCK 400.0 // PulseBlaster core clock rate int main (int argc, char **argv) int start; printf ("Copyright (c) 2010 SpinCore Technologies, Inc.\n\n"); printf("Using SpinAPI library version %s\n", pb_get_version()); if (pb_init () != 0) { printf ("Error initializing board: %s\n", pb_get_error());...
PulseBlasterESR-PRO IV. Connecting to the PulseBlasterESR-PRO The PulseBlasterESR-PRO functionality is available on SP18A, SP49, SP56 boards, SP47, and SP51 USB rackmounts. The connectors for the PulseBlasterESR-PRO boards and USB rackmounts are explained below in their respective sections. Connector Information for PulseBlasterESR-PRO Boards On the PCI (SP18A) and PCIe boards (SP49, SP56), there are four main connector banks: the BNC headers, the IDC headers, the SMA headers, and the Trigger/Reset header.
PulseBlasterESR-PRO Figure 6: BNC T-Adapter on the oscilloscope with coaxial transmission line connected on the left and BNC 50 Ohm resistor connected on the right, to terminate the line. IDC Headers for SP18A, SP49, and SP56 14 15 16 17 18 19 20 21 22 23 24 25 26 9 10 11 12 13 Figure 7: IDC header Pin-Out.
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PulseBlasterESR-PRO Pin Assignments Pin# Flag0..11 Flag12..23 Flag24..35 Bit 0 Bit 12 Stopped Bit 1 Bit 13 Reset Bit 2 Bit 14 Running Bit 3 Bit 15 Waiting Bit 4 Bit 16 Unused Bit 5 Bit 17 Unused Bit 6 Bit 18 Unused Bit 7 Bit 19...
PulseBlasterESR-PRO Connector Locations for the SP18A board Flag24..35 Out Flag0...11 Out Flag12..23 Out BNC3 SMA0 SMA1 SMA2 SMA3 SMA4 SMA5 SMA6 SMA7 BNC2 HW_TRIG/RESET BNC1 BNC0 Figure 8: Connector Locations (SP18A). SMA Headers for SP18A The eight SMA headers provide access to the flag bits 4 through 11. SMA0, the header closest to the BNC headers, corresponds to flag bit 4.
PulseBlasterESR-PRO Connector Locations for the SP49 and SP56 boards FLAG39 (BNC3) Flag0...11 Flag12..23 Flag24..35 FLAG40 FLAG41 FLAG42 FLAG43 FLAG44 FLAG38 (BNC2) FLAG45 FLAG46 FLAG47 FLAG37 (BNC1) J300 EXT_CLK CLK_OUT FLAG36 (BNC0) Figure 10: Connector Locations (SP49 and SP56). SMA Headers for SP49 and SP56 The eight SMA headers provide access to the flag bits 4 through 11.
PulseBlasterESR-PRO SMA Connector CLK_OUT This SMA connector outputs the reference clock as a 3 V positive-only signal. Note that the PulseBlasterESR-PRO PCIe board uses 50 MHz as the reference clock frequency and that clock is internally multiplied to provide that actual PulseBlaster Core frequency .
PulseBlasterESR-PRO DB9 Connector (Trig/Res/Stat) for 2U BNC Rackmount Enclosure and Rackmount Front Panel The Trig/Res/Stat DB9 connector information is shown in Figure 12 and Table 4, below. The Hardware Trigger and Hardware Reset are both low-true, so each of these pins would need to be shorted to ground to cause a trigger or reset, respectively.
PulseBlasterESR-PRO Power Connector for the Rackmount Front Panel The PulseBlasterESR-PRO Rackmount Front Panel option has a 4-pin Molex-style connector for supplying power. The pin and signal arrangements for this connector is as follows: Figure 13: 4 Pin input connector (TE Connectivity AMP part 174804-1).
PulseBlasterESR-PRO Hardware Reset The SP18A, SP47, and SP51 have the HW_Reset hardware reset pin. The SP49 and SP56 PCIe boards have the HW_Reset and HW_Reset_H hardware reset pins. HW_Reset is pulled to high voltage (3.3V) on the board and can be activated by a low voltage pulse (or shorting to GND). HW_Reset_H is pulled to low voltage on the board (ground) and can be activated by a high voltage pulse (to 3.3V).
PulseBlasterESR-PRO Figure 14: Demonstration of HW_Trigger high-low-high signal. The blue shows the HW_Trigger signal, the pink shows one of the output flags. Caution: applying voltages to the input pins that are greater than 3.3V or less than 0V will damage the PulseBlasterESR-PRO. Clock Oscillator Header The PulseBlasterESR-PRO comes with a crystal oscillator mounted on the oscillator socket to provide a timing signal for the board.
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PulseBlasterESR-PRO Figure 15: Both the bare header socket and the installed clock module are shown above. Please note the proper orientation of the 50 MHz clock. Pin 1 of the oscillator socket on the SP49, SP47, SP51, and SP56 outputs 1.65 V. Pin 1 of the oscillator socket on the SP18A is no connect. Please take caution to provide a controlled signal at the correct frequency.
PulseBlasterESR-PRO Appendix I: Controlling the PulseBlasterESR- PRO with SpinAPI Instruction Set Architecture Machine-Word Definition The PulseBlasterESR-PRO pulse timing and control processor implements an 80-bit wide Very Long Instruction Word (VLIW) architecture. The VLIW is partitioned into fields dedicated to specific purposes, and every VLIW is viewed as a single instruction by the microcontroller.
PulseBlasterESR-PRO Output Pattern and Control Word Table 6 shows the output pattern and control bit assignments of the 24-bit output/control word. Bit # Function Bit # Function Controls Pulse Length for BNC connectors Output Connector labeled Flag0..11, Pin 12 Controls Pulse Length for BNC connectors Output Connector labeled Flag0..11, Pin 11 Controls Pulse Length for BNC connectors Output Connector labeled Flag0..11, Pin 10...
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PulseBlasterESR-PRO When bits 21-23 are zero, the output flags remain low for the duration of the instruction. When bits 23-21 are from “000” to “101,” the programmed flag values will be outputted for the specified number of clock cycles. To disable the Short Pulse feature, bits 21 to 23 must be set to “111.” Figure 17 gives an example of the Short Pulse feature.
PulseBlasterESR-PRO Data Field and OpCode Please refer to the following table for information on the available instructions and their associated data field argument. OpCode Inst Inst_data Function Program execution continues to next CONTINUE Ignored instruction. See note (1) and (2) following this table.
PulseBlasterESR-PRO Delay Count The value of the Delay Count field (a 32-bit value) determines how long the current instruction should be executed. The allowed minimum value of this field is 0x00000002 and the allowed maximum is 0xFFFFFFFF. The timing controller has a fixed delay of three clock cycles and the value that one enters into the Delay Count field should account for this inherent delay.
PulseBlasterESR-PRO Related Products and Accessories 1. Oven Controlled Clock Oscillator (sub-ppm stability) shown in Figure 18. For ordering information, please visit http://spincore.com/products/OCXO/ or contact SpinCore at http://www.spincore.com/contact.shtml. Figure 18: An Oven Controlled Clock Oscillator (or OCXO) with sub-ppm frequency stability is available for the PulseBlasterESR-PRO upon request.
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PulseBlasterESR-PRO 3. SpinCore MMCX Adapter Board (Figures 20 and 21) – These adapter boards allow easy access to the individual bits of the PulseBlasterESR-PRO boards. These adapter board can be part of a package that includes 12 MMCX to BNC cables and three SMA to BNC adapters. However, this package can be changed to include any number of cables and any number of adapter boards.
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PulseBlasterESR-PRO Figure 22: SP32, MMCX Adapter Board orientation and configuration with PulseBlaster SP18A Board. Figure 23: SP53, MMCX Adapter Board orientation and configuration with PulseBlaster SP18A Board. http://www.spincore.com 2022/12/06...
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PulseBlasterESR-PRO 4. The SMA-BNC Adapter Board, shown in Figure 24, provides easy access to four additional output signals from the back panel of your computer. SMA-SMA cables are available from SpinCore upon request. For ordering information, please visit http://spincore.com/products/Adapters/ or contact SpinCore at http://www.spincore.com/contact.shtml .
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Figure 26: TTL Line Driver assures TTL levels over 50 Ohm loads. 7. If you require a custom design, custom interface cables, or other custom features, please inquire with SpinCore Technologies through our contact form, which is available at http://www.spincore.com/contact.shtml.
PulseBlasterESR-PRO Contact Information SpinCore Technologies, Inc. 4631 NW 53rd Avenue, SUITE 103 Gainesville, FL 32653 Telephone (USA): 352-271-7383 Website: http://www.spincore.com Web Contact Form: http://spincore.com/contact.shtml Document Information Revision history available at SpinCore. http://www.spincore.com 2022/12/06...
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