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PulseBlasterESR DualCore 8M™
Owner's Manual
SpinCore Technologies, Inc.
http://www.spincore.com

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Summary of Contents for SpinCore Technologies PulseBlasterESR DualCore 8M

  • Page 1 PulseBlasterESR DualCore 8M™ Owner’s Manual SpinCore Technologies, Inc. http://www.spincore.com...
  • Page 2 SpinCore Technologies, Inc. makes every effort to verify the correct operation of the equipment. This equipment version is not intended for use in a system in which the failure of a SpinCore device will threaten the safety of equipment or person(s).
  • Page 3: Table Of Contents

    PulseBlasterESR DualCore 8M Table of Contents I. Introduction ..........................4 Product Overview ........................4 Programming Paradigm ......................4 Specifications .......................... 5 II. Installing and Using Your PulseBlasterESR DualCore ............6 Installation ..........................6 General API Programming Information .................. 6 Triggering PulseProgram Execution ..................7 Stopping PulseProgram Execution ..................
  • Page 4: Introduction

    I. Introduction Product Overview The SpinCore PulseBlasterESR DualCore 8M is a dual-core PulseBlaster design implemented on a new series of PulseBlasterESR PCI boards with up to 4194304 instruction per core. The dual-core design uses two of SpinCore's proprietary PulseBlaster processor cores on a single chip. This new design allows the user to program and run completely independent programs on each core, in parallel, while maintaining precise timing synchronization between each core.
  • Page 5: Specifications

    PulseBlasterESR DualCore 8M Specifications Parameter Units Digital Outputs Number of Digital Outputs Logical 1 Output Voltage 2.00 Logical 0 Output Voltage Output Drive Current Rise/Fall Time <1 Digital Inputs Logical 1 Input Voltage (HW_Trig, HW_Reset) Logical 0 Input Voltage -0.5...
  • Page 6: Installing And Using Your Pulseblasteresr Dualcore

    The DualCore PulseBlasterESR board requires a specialized version of SpinAPI called the – MultiCore SpinAPI. 2) Shut down computer, insert the PulseBlasterESR DualCore 8M card, and fasten the PC bracket. Your system should detect the board as a “PulseBlaster Multicore” device. –...
  • Page 7: Triggering Pulseprogram Execution

    PulseBlasterESR DualCore 8M Triggering PulseProgram Execution The PulseBlasterESR DualCore can be triggered in two ways, either by software trigger or hardware trigger. The software trigger is initiated by sending a command from the host PC via the pb_start() function. Since the PulseBlasterESR DualCore boards are typically used with non real-time operating systems, the exact time between issuing a software trigger and the board acting on that trigger cannot be precisely specified.
  • Page 8: Test Programs

    Seven test programs have been packaged with the SpinAPI driver suite to illustrate the basic features and functionality of the PulseBlasterESR DualCore 8M design. All programs can be found at: Start → All Programs → SpinAPI → Examples → DualCore Examples (the default installation location is: “C:\SpinCore\SpinAPI\Examples\DualCore Examples”).
  • Page 9: Example 2

    PulseBlasterESR DualCore 8M Example 2 The second example is composed of two separate files: pb_dualcore_example2a.c and pb_dualcore_example2b.c. Each of these examples are used to program one core with a pulse sequence (50 ns on/50 ns off) that will occupy the entire 4M instruction memory, and one core with a single pulse that is on for the equivalent pulse program time.
  • Page 10: Example 3

    PulseBlasterESR DualCore 8M Example 3 The third test program, pb_dualcore_example3.c, demonstrates creating Pulse Programs with an adjustable offset between the first pulse as low as 2.00 ns. When the program is run, the user will be prompted for the offset between the two cores. This must be a multiple of 2.00 ns.
  • Page 11: Example 4

    PulseBlasterESR DualCore 8M Example 4 The fourth test program, pb_dualcore_example4.c, demonstrates the stability of the counters in each PulseBlaster cores by generating an increasingly long pulse, starting at the minimum pulse length and increasing by 2.00 ns every 100 ms. This is accomplished by using a continuous loop within the C-program. To exit the program, enter CTRL-C or close the prompt window.
  • Page 12: Example 5

    PulseBlasterESR DualCore 8M Example 5 The fifth test program, pb_dualcore_example5.c, explores a range of offsets between cores. The program starts with no offset, then increases the offset by 2.00 ns every 100 ms up until a 236 ns offset. The offset then begins decreasing by 2.00 ns every 100 ms.
  • Page 13: Appendices

    BNC0 Diagram 2: PulseBlaster DualCore Connector Layout Note: For the PulseBlasterESR DualCore 8M design, only flags 0 and flags 1 are used (BNC0 and BNC1 respectively.) The shrouded IDC connectors labeled Flag 12..23and Flag 24.. 35 can also be accessed using an SP32 board (Figure 1) which allows the use of MMCX cables.
  • Page 14: Clock Header

    PulseBlasterESR DualCore 8M Pin Number Function INT0 INT1 INT2 HW_Reset HW_Trigger Table 2: HW_TRIG/RESET Header Pin-out CLOCK Header Diagram 4: CLOCK Header Pin Number Function No Connect VCC(3.3V) No Connect VCC(3.3V) CLOCK_INPUT Table 3: CLOCK Header Pin-out Appendix B: Hardware Triggering/Reset In order to provide precise and predictable triggering and reset latencies, the PulseBlasterESR DualCore provides an external hardware reset and hardware trigger inputs.
  • Page 15: Appendix C: Synchronization Of Multiple Boards

    PulseBlasterESR DualCore 8M The hardware trigger (HW_Trigger) and reset pins (HW_Reset) are pulled internally to a logical high level via a 10kΩ resistor. In order for a hardware trigger or reset to be detected, the appropriate pin must be driven low via an external source for at least one clock period (2.0 ns).
  • Page 16: Related Products And Accessories

    PulseBlasterESR DualCore 8M V. Related Products and Accessories 1. OCXO – Oven Controlled Oscillator. Figure 1 – This oscillator is available in a frequency of 50 MHz. For ordering information contact SpinCore at http://www.spincore.com/contact.shtml. Figure 1: OCXO Oven Controlled Oscillator www.spincore.com...
  • Page 17: Contact Information

    PulseBlasterESR DualCore 8M VI. Contact Information SpinCore Technologies, Inc. 4631 NW 53rd Avenue, Suite 103 Gainesville, Florida 32653, USA Phone: +1-352-271-7383 Fax: +1-352-371-8679 Website: http://www.spincore.com www.spincore.com 2013/08/28...
  • Page 18: Document Information

    PulseBlasterESR DualCore 8M VII. Document Information Document Title: PulseBlasterESR DualCore 8M Document Number: DA-76 File Name: PBESR_DualCore_Manual Revision History: Revision History Available at SpinCore www.spincore.com 2013/08/28...

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