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1. PCIe-5111 Specifications
Multi-functional Data Acquisition Boards
Please download JYTEK <JYPEDIA>,
you can quickly inquire the product
prices, the key features and available
accessories.
V 1.0.4
Overview
JYTEK PCIe-5111 provide up to 32
channels of analog inputs of up to 500K
samples per second, 4 channels of
analog outputs, 48 channels of digital IO
or 4 32-bit counters/timers
1.1. Main Features
⚫
Up to 32 single-ended/16 differential 16-bit
analog input channels
⚫
Sampling rates: 500 kS/s for one channel,
300 kS/s for multi-channel
⚫
16 bits ADC
⚫
64M samples of analog input FIFO buffer
⚫
4 simultaneous 16-bit analog output
channels
⚫
32M sample FIFO buffer for analog output
⚫
6 ports digital IO, 8 lines per port
⚫
DIO supports hardware timing up to 10MHz
⚫
4 channels 32-bit timer/counter
⚫
DMA for AI, AO and DIO
⚫
Analog/Digital/Software Trigger
JY5111 |
jytek.com
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Table of Contents
Related Manuals for JYTEK PCIe-5111
Summary of Contents for JYTEK PCIe-5111
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Page 1: Pcie-5111 Specifications
1. PCIe-5111 Specifications Multi-functional Data Acquisition Boards Overview JYTEK PCIe-5111 provide up to 32 channels of analog inputs of up to 500K samples per second, 4 channels of analog outputs, 48 channels of digital IO or 4 32-bit counters/timers 1.1. Main Features ⚫... -
Page 2: Analog Input
Trigger type Digital, Analog, Software Trigger mode StartTrigger, ReferenceTrigger, ReTrigger Analog trigger voltage range ±10V Software Programmable Continuous : 20m A, ±25 V Overvoltage Protection Instantaneous : 40 mA, ±25 V Table 1 Analog Input Specifications V 1.0.4 JY5111 | jytek.com... -
Page 3: Analog Output
Input Gate，Source，Aux Output Table 3 Counter Input Operations Specifications 1.5. PFI Specifications Number of channels Trigger voltage : 3.3 V TTL External digital trigger interface Trigger edge: Rising/Falling Initial state Input Table 4 PFI Specifications V 1.0.4 JY5111 | jytek.com... -
Page 4: Digital Io Specifications
10 V range: valid for ±9.5V Table 6 Basic Accuracy in DAQ Mode 1.8. AI Bandwidth Analog Input Bandwidth Nominal Range Full Scale (V) -3dB Bandwidth (KHz) ±10 ±5 ±2.5 ±1.25 ±0.625 Table 7 AI Bandwidth Specifications V 1.0.4 JY5111 | jytek.com... -
Page 5: Basic Ao Accuracy
0 ° C to 50 ° C Relative humidity range 20% to 80%, noncondensing Storage Environment -20 ˚C to 80 ˚C Ambient temperature range Relative humidity range 10% to 90%, noncondensing Table 10 Physical and Environment V 1.0.4 JY5111 | jytek.com... -
Page 6: Front Panel And Pin Definition
1.12. Front Panel and Pin Definition Figure 1 PCIe 5111 Front Panel V 1.0.4 JY5111 | jytek.com... - Page 7 66 AI 9（AI 1-） 32 AI_GND 66 AI 25（AI 17-） 33 AI 1（AI 1+） 67 AI_GND 33 AI 17（AI 17+） 67 AI_GND 34 AI 8（AI 0-） 68 AI 0（AI 0+） 34 AI 24（AI 16-） 68 AI 16（AI 16+） V 1.0.4 JY5111 | jytek.com...
- Page 8 Table 11 5111 Pin Definition Table 12 Cable Specification V 1.0.4 JY5111 | jytek.com...
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Page 9: Accessories
⚫ DIN-68S-01 (PN: JA9114029-01) SCSI 68-pin Terminal board w/o cable ⚫ TB-68 (PN: JY2000068-03) 68-Pin SCSI Shielded I/O Connector Block ⚫ ACL-2006868-1 (PN: JY2006868-01) 1M 68pin VHDCI68M-SCSI68M cable ⚫ ACL-2006868-2 (PN: JY2006868-02) 2M 68pin VHDCI68M-SCSI68M cable V 1.0.4 JY5111 | jytek.com... -
Page 10: Table Of Contents
6.2. Basic AO Accuracy ....................... 17 7. Additional Software Information ................17 7.1. System Requirements ....................17 7.2. System Software ......................18 7.3. C# Programming Language ..................18 7.4. PCIe-5111 Series Hardware Driver ................18 V 1.0.4 JY5111 | jytek.com | 10... - Page 11 7.5. Install the SeeSharpTools from JYTEK ................ 19 7.6. Running C# Programs in Linux ..................19 8. Operating JY5111 ....................... 20 8.1. Quick Start ........................20 8.2. Data Acquisition Methods ..................20 8.2.1. Continuous Acquisition ..................24 8.2.2. Finite Acquisition ....................24 8.2.3.
- Page 12 10.4. Reducing the Common Mode Voltage Effect ............104 11. About JYTEK ......................105 11.1. JYTEK China ......................105 11.2. JYTEK Korea and JYTEK in Other Countries............. 106 11.3. JYTEK Hardware Products ..................106 11.4. JYTEK Software Platform ..................107 11.5.
- Page 13 Table 11 5111 Pin Definition ..............8 Table 12 Cable Specification ..............8 Table 13 Supported Linux Versions ............18 Table 14 SSI Connector Pin Assignment for PCIe-5111 ......98 Table 15 Typical AI Accuracy ............... 100 Table 16 AI Bandwidth ................. 101 Table 17 Typical AO Accuracy ..............
- Page 14 Figure 71 Frequency Measure For Single Mode ........73 Figure 72 Frequency Measure For Continuous Mode ......74 Figure 73 Frequency Measure Values ........... 75 Figure 74 Peroid Measure For Single Mode .......... 76 V 1.0.4 JY5111 | jytek.com | 14...
- Page 15 Figure 101 Continuous Pulse Generation ..........97 Figure 102 AI Acquisition Continuous Pulse .......... 98 Figure 103 SSI Connector in PCIe-5111 ..........98 Figure 104 AI Measurement Error ............100 Figure 105 AI Error due to System Random Noise ......102 Figure 106 Common Mode Rejection Ratio .........
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Page 16: Software
The DAQ mode is the normal data acquisition mode commonly found in commercial DAQ hardware. The basic AI DC accuracy Table 6 of the DAQ mode provides accuracy entries when PCIe-5111 operates in the single channel mode and within the indicated calibration temperature range. Please note that this accuracy is valid for every single point regardless how many sample points you acquire. -
Page 17: Basic Ao Accuracy
24-Hour calibration column is 348 µV. 6.2. Basic AO Accuracy The AO output accuracy of PCIe-5111 when using the analog output function can be calculated according to the corresponding parameters in the Table 8 Each entry in the basic accuracy table is a pair of gain and offset coefficients. Using... -
Page 18: System Software
中标麒麟高级服务器操作系统软件V7.0U6: 3.10.0-957.el7.x86_64 Table 13 Supported Linux Versions 7.2. System Software When using the PCIe-5111 series in the Window environment, you need to install the following software from Microsoft website: Microsoft Visual Studio Version 2015 or above, .NET Framework version is 4.0 or above. -
Page 19: Install The Seesharptools From Jytek
7.5. Install the SeeSharpTools from JYTEK To efficiently and effectively use PCIe-5111 boards, you need to install a set of free C# utilities, SeeSharpTools from JYTEK. The SeeSharpTools offers rich user interface functions you will find convenient in developing your applications. -
Page 20: Operating Jy5111
If you want to use your own Linux development system other than MonoDevelop, you can do it by using our Linux driver. However, JYTEK does not have the capability to support the Linux applications. JYTEK completely relies upon Microsoft to maintain the cross-platform compatibility between Windows and Linux using MonoDevelop. - Page 21 Sample Rate, SamplesToAcquire, Channel Count, ChannelRange and Analog Input Terminal Type. AI Acquisition mode (AIMode):PCIe-5111 provides 4 acquisition modes, Continuous, Finite, Single Point, Record, which will be described in details in Section 8.2.1-8.2.4. SampleRate: How fast data are acquired per second per channel. For example, if the sample rate is 1000Hz, you acquire two channels of data, you will have 2000 points/second.
- Page 22 User can get Multichannel maximum sample rate (aggregate) from section Appendix. Learn by Example 8.2 ◼ Connect the two signal source’s positive outputs to PCIe-5111 AI Ch0 (AI0+, Pin #68) and AI Ch1 (AI1+, Pin#33), two negative terminals to the ground...
- Page 23 ◼ Open Analog Input-->Winform AI Continuous MultiChannel, set the following numbers as shown. This sample program will continuously acquire data from multiple channels. Figure 5 Continuous MultiChannel Paraments ➢ SampleRate is set by Sample Rate V 1.0.4 JY5111 | jytek.com | 23...
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Page 24: Continuous Acquisition
An AI acquisition task will acquire the data continuously until the task is stopped. The PCIe-5111 device will continue acquiring data and save the data in a circular buffer. You specify how many samples to read back by the user buffer’s length, if your program does not read the data fast enough, the circular buffer may overflow. -
Page 25: Single Point Acquisition
The mode is particularly useful for high-speed acquisition and recording applications. 8.3. Analog Input Terminal Type The PCIe-5111 provide 3 analog input terminal types: ◼ Differential (DIFF) ◼ Referenced Single-Ended (RSE) ◼ Non-Referenced Single-Ended (NRSE) The DIFF connection is recommended for ground-referenced signal sources and it is usually better in rejecting the common-mode noise. -
Page 26: Diff Mode
Learn by Example 8.3.1 ◼ Open the program Analog Input-->Winform AI Continuous MultiChannel ◼ Connect the two signal source’s positive outputs to PCIe-5111 AI Ch0 (AI0+, Pin #68) and AI Ch1 (AI1+, Pin#33), two negative terminals to AI Ch0 negative (AI0-, Pin#34) and AI Ch1 negative (AI1-, Pin#66) as shown in Figure 3 and Figure 4. - Page 27 Figure 8 Choose Differential in AI Terminal V 1.0.4 JY5111 | jytek.com | 27...
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Page 28: Rse Mode
Figure 10. NRSE is also called the pseudo differential mode, because it looks very similar to a DIFF connection. In this mode, the PCIe-5111 device offers a special reference point, AI SENSE. Instead of connecting two grounds directly, signal’s ground and PXI device’s ground, the input signals’... - Page 29 ◼ This Example needs two TB-68 terminal blocks, Connector0 and Connector1 and two cables, which are connected to PCIe-5111. Connect the two signal source’s positive outputs to PCIe-5111 AI Ch0 (AI0+, Pin #68) and AI Ch1 (AI1+, Pin#33), two negative terminals to AI_SENSE 0 (Pin#62) of the first TB-68 and AI_SENSE 1 (Pin#62) of the second TB-68 as shown in Figure 3 and Figure 4.
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Page 30: Trigger Source
This trigger mode does not require configuration and is triggered immediately when an operation starts. The operation can be AI, AO, DI, DO, CI, CO etc. Learn by Example 8.4.1 ◼ Use the same program and connection as in Learn by Example8.2. V 1.0.4 JY5111 | jytek.com | 30... -
Page 31: Software Trigger
Learn by Example 8.4.2 ◼ Connect the signal source’s positive terminal to PCIe-5111 AI Ch0 (AI0+, Pin#68), the negative terminal to the ground (AI_GND, Pin#67) as shown in Figure 3 and Figure 4. (AI0+, AI_GND) consists of a RSE input. - Page 32 ➢ Data will not be acquired until there is a positive signal from Software Trigger when Send Soft Trigger is clicked. ◼ After sending the trigger signal, the result will be like this: Figure 14 Software trigger Acquisition V 1.0.4 JY5111 | jytek.com | 32...
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Page 33: External Analog Trigger
8.4.3. External Analog Trigger You can assign one of measurement channels as the analog trigger source. PCIe-5111 provides three analog trigger modes: ◼ Edge comparator, ◼ Hysteresis comparator, ◼ Window comparator. Analog trigger threshold range can be arbitrarily selected in the effective range of the selected channel. - Page 34 The output will change to low when the signal goes above the high threshold as shown in Figure 18. V 1.0.4 JY5111 | jytek.com | 34...
- Page 35 Entering Window Trigger: The window comparator output is high when the signal enters the window defined by the Low Threshold and High Threshold. The output will change to low when the signal leaves the window as shown in Figure 19. V 1.0.4 JY5111 | jytek.com | 35...
- Page 36 Figure 20 Leaving Window Trigger Learn by Example 8.4.3 ◼ Connect the signal source’s positive terminal to PCIe-5111 AI Ch0 (AI0+, Pin#68), the negative terminal to the ground (AI_GND, Pin#67) as shown in Figure 3 and Figure 4. (AI0+, AI_GND) consists of a RSE input.
- Page 37 ➢ Modes of the Analog Trigger are set by Trigger Comparator. Set it to Edge. ➢ The edge of EdgeComparator set by Trigger Edge. (Rising and Falling) ➢ Trigger source can be any channel of PCIe-5111 analog input. Set it to Channel_0.
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Page 38: External Digital Trigger
Figure 24 V 1.0.4 JY5111 | jytek.com | 38... - Page 39 Figure 24 External Digital Trigger Learn by Example 8.4.4 ◼ Connect the signal source two positive terminals to PCIe-5111 AI Ch0, (AI0+, Pin #68) and digital trigger source (PFI 0, Pin#11), two negative terminals to the ground of analog input (AI_GND, Pin#67) and the ground of digital input/output (DGND, Pin#44) as shown in Figure 3 and Figure 4 (AI0+, AI_GND) consists of a RSE input.
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Page 40: Trigger Mode
8.5. Trigger Mode The PCIe-5111's analog inputs support several trigger modes: start trigger, reference trigger, and re-trigger. 8.5.1. Start Trigger In this mode, data acquisition begins immediately after the trigger. This trigger mode is suitable for continuous acquisition and finite acquisition. -
Page 41: Reference Trigger
⚫ Total samples: 1000; ⚫ Channel Count: 1 ⚫ Pre-trigger samples: 10; ⚫ After triggering, it returns total 1000 samples, 10 being pre-triggered, 990 after triggering The principle is shown in Figure 28. V 1.0.4 JY5111 | jytek.com | 41... -
Page 42: Retrigger
Figure 28 Reference Trigger 8.5.3. ReTrigger PCIe-5111 supports retrigger mode. In the retrigger mode, you can set the number of retrigger and the length of each acquisition. Assuming that the number of re triggers is n and the length of each trigger acquisition is m, the length of all acquisition data is n * m * channelcount. - Page 43 Retrigger Count. ➢ PretriggerSamples is set by Pretrigger Samples. ◼ Now the trigger is a Start Trigger. Click Start to begin the data acquisition, the result is shown below: V 1.0.4 JY5111 | jytek.com | 43...
- Page 44 ◼ Now change the Trigger Mode to Reference mode with Pretrigger Samples 1000. A different result shows below: Figure 32 Retrigger In Reference Trigger Mode ➢ You can see the horizontal movement between two signals due to the change of Trigger Mode. V 1.0.4 JY5111 | jytek.com | 44...
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Page 45: Ao Operations
Learn by Example 8.6.1 ◼ Connect PCIe-5111 AO Ch0 (AO0, Pin #22) to AI Ch0 (AI0+, Pin#68), Ground of AO0 (AO_GND, Pin#55) to Ground of AI0 (AI_GND, Pin#67). (AI0+, AI_GND) consists of a RSE input;... - Page 46 Figure 34 AI Continuous Paraments ◼ Click Start to start the data acquisition. ◼ Open Analog Output-->Winform AO Finite, set the following numbers as shown: Figure 35 AO Finite Output Paraments V 1.0.4 JY5111 | jytek.com | 46...
- Page 47 ◼ Click Start to generate a SineWave. The generated signal is shown below: Figure 36 AO Finite Signal ◼ And the received signal is shown below. Figure 37 AI Acquisition Signal ➢ The analog signal is successfully generated and received by PCIe-5111. V 1.0.4 JY5111 | jytek.com...
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Page 48: Continuous Nowrappping Output
AO. Learn by Example 8.6.2 ◼ Connect PCIe-5111 AO Ch0 (AO0, Pin #22) to AI Ch0 (AI0+, Pin#68), Ground of AO0 (AO_GND, Pin#55) to Ground of AI0 (AI_GND, Pin#67). (AI0+, AI_GND) consists of a RSE input; (AO0, AO_GND) consists of an output. - Page 49 Waveform Configuration when generating the wave. After the configuration you should click Update to apply the changes. ◼ Click Start to generate a sine wave first. The result is shown below. V 1.0.4 JY5111 | jytek.com | 49...
- Page 50 ◼ And the received signal is shown below. Figure 41 AI Acquisition AO Sin Signal ◼ Now change the Wave Type to SquareWave and click Update to generate it. The result is shown below. V 1.0.4 JY5111 | jytek.com | 50...
- Page 51 Figure 42 Update AO Square Signal ◼ And the received signal is shown below. Figure 43 AI Acquisition AO Square Signal ➢ The analog signal is successfully generated and received by PCIe-5111. V 1.0.4 JY5111 | jytek.com | 51...
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Page 52: Continuous Wrapping Output
Learn by Example 8.6.3 ◼ Connect PCIe-5111 AO Ch0 (AO0, Pin #22) to AI Ch0 (AI0+, Pin#68), Ground of AO0 (AO_GND, Pin#55) to Ground of AI0 (AI_GND, Pin#67). (AI0+, AI_GND) consists of a RSE input; (AO0, AO_GND) consists of an output. - Page 53 Figure 45 AO Continuous Wrapping Paraments ◼ Click Start to generate the signal. The result is shown below. Figure 46 AO Continuous Wrapping Signal ◼ And the received signal is shown below. V 1.0.4 JY5111 | jytek.com | 53...
- Page 54 Figure 47 AI Acquisition AO Signal ➢ The analog signal is successfully generated and received by PCIe-5111. V 1.0.4 JY5111 | jytek.com | 54...
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Page 55: Digital I/O Operations
I/O channels. User can acess these I / O information through software polling. Learn by Example 8.7.1 ◼ In this example PCIe-5111 outputs a digital signal by its DO function and reads it back by its DI function. ◼ Connect Connector1 of PCIe-5111 to the TB-68 terminal block according to Figure 4. - Page 56 Figure 48 Single Digital Output Figure 49 Single Digital Input V 1.0.4 JY5111 | jytek.com | 56...
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Page 57: Dynamic Di/Do
(update rate) of up to 10MHz. User can acquire or output digital waveforms in this way. Learn by Example 8.7.2 ◼ In this example PCIe-5111 outputs a squarewave by its DO function and reads it back by its DI function. ◼ Connect Connector1 of PCIe-5111 ◼... - Page 58 Figure 51 DO ContinuousNoWrapping Output ◼ In program Winform DI Continuous, you can see the acquired signal. Select port 1(PCIe-5110/5111) or port 0(PCIe-5110/5111). Figure 52 DI Continuous Acquisition ➢ The digital signal is successfully generated and acquired by PCIe-5111. V 1.0.4 JY5111 | jytek.com...
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Page 59: Counter Input Operations
8.8. Counter Input Operations The PCIe-5111 has four or two identical 32 bits timers/counters. Figure 53 Counter Terminal Each counter has seven input terminals and one output terminal, and these terminals have different functions in different counter input application types, including: ⚫... -
Page 60: Edge Counting
Figure 55 Simple Edge Counting in Single Mode 2) Finite/Continuous Mode with Internal Sample Clock The count value is stored into the buffer on each rising edge or falling edge of the sample clock as shown in Figure 56. V 1.0.4 JY5111 | jytek.com | 60... - Page 61 Figure 57 Simple Edge Counting with Implicit SampleClk Counting Direction User can control the counting direction through software configuration or by an input signal with Gate terminal. When using an input signal to control the counting V 1.0.4 JY5111 | jytek.com | 61...
- Page 62 Figure 58 Count Direction Learn by Examples8.8.1 ◼ Connect the signal source’s positive terminal of a signal source to PCIe-5111 counter0’s edge counting source (CTR0_Source/A, Pin#11), negative terminal to the ground (DGND, Pin#44) as shown in Figure 3 and Figure 4. (CTR0_Source, DGND) consists of an edge counting counter input and they share the same ground.
- Page 63 ◼ The result is shown by Counter Value. In this example the Counter Value increases by 1 every second for a 1Hz sinewave. Finite/Continuous Mode ◼ Change the squarewave frequency to 50 Hz. ◼ Open Counter Input-->Winform CI Finite/Continuous EdgeCounting, set the following numbers as shown: V 1.0.4 JY5111 | jytek.com | 63...
- Page 64 ➢ The table in the sample program is a connection diagram for your convenience. ➢ Counter Direction is set by Counter Direction. ➢ There are two clock sources in PCIe-5111 Internal and Implicit: This example uses Internal mode set by Clock Source.
- Page 65 ◼ Change the Clock Source to Implicit: Figure 62 Counter Values For Implicit Clock ➢ The numbers are stored in a buffer CounterValues. ➢ The counter values are different as before because of the change from Clock Source. V 1.0.4 JY5111 | jytek.com | 65...
- Page 66 V 1.0.4 JY5111 | jytek.com | 66...
- Page 67 2) Finite/Continuous Mode with Internal Sample Clock The count value of the duration of the high or low level is stored into the buffer on each rising or falling edge of the sample clock, as shown in Figure 64. V 1.0.4 JY5111 | jytek.com | 67...
- Page 68 Figure 65 Pulse Measurement with Implicit SampleClk Learn by Examples 8.8.2 ◼ Connect the signal source’s positive terminal to PCIe-5111 counter0’s pulse measure source (CTR0_Gate/Z, Pin#10), negative terminal to the ground (DGND, Pin#44) as shown in Figure 3 and Figure 4. (CTR0_Gate/Z, DGND) consists of a pulse measure counter input and they share the same ground.
- Page 69 ➢ The table in the sample program is a connection diagram for your convenience. ◼ Click Start to start measuring the pulses. The result is shown by High Pulse Measure(S) and Low Pulse Measure(S): Figure 67 Pulse Measure Value For Single Mode V 1.0.4 JY5111 | jytek.com | 69...
- Page 70 Figure 68 Pulse Measure For Finite Mode ➢ The table in the sample program is a connection diagram for your convenience. ◼ Click Start to begin the finite/continuous pulse measurement. The result is shown below: V 1.0.4 JY5111 | jytek.com | 70...
- Page 71 ) values and known frequency of �� ℎ �� the timebase (�� ) according to the formula 1 and return the result to the user. �������� �� = �� × �� �������� �������� + �������� ℎ �� V 1.0.4 JY5111 | jytek.com | 71...
- Page 72 �� = �� × �� �������� ��2 3) Finite/Continuous Mode with Implicit Sample Clock Frequency Measurement with implicit sample clock is actually using Pulse Measurement internally. refer to chapter 8.8.2 for more information. V 1.0.4 JY5111 | jytek.com | 72...
- Page 73 �� Learn by Examples 8.8.3 ◼ Connect the signal source’s positive terminal to PCIe-5111 counter0’s frequency measure source (CTR0_Gate/Z, Pin#10), negative terminal to the ground (DGND, Pin#44) as shown in Figure 3 and Figure 4. (CTR0_Gate/Z, DGND) consists of a frequency measure counter input and they share the same ground.
- Page 74 ➢ Internal and Implicit Sample Clocks are set by Clock Source as before. (Please refer to Finite/Continuous Mode for more information.) ◼ Click Start and it will show the frequency 50 as set in the signal resource. V 1.0.4 JY5111 | jytek.com | 74...
- Page 75 Measurement. Refer to chapter 8.8.3 for more information. Learn by Examples 8.8.4 ◼ Connect the signal source’s positive terminal to PCIe-5111 counter0’s period measure source (CTR0_Gate/Z, Pin#10), negative terminal to the ground (DGND, Pin#44) as shown in Figure 3 and Figure 4. (CTR0_Gate/Z, DGND) consists of a period measure counter input and share the same ground.
- Page 76 ➢ The result of Period Measure(S) shows the correspond to the frequency set before. Finite/Continuous Mode ◼ Open Counter Input-->Winform CI Finite/Continuous Period Measure and click Start. The result is shown below by PeriodMeasure (S). V 1.0.4 JY5111 | jytek.com | 76...
- Page 77 The number of rising edges of timebase between the rising edge of the first signal and the rising edge of the second signal is written to the register on each rising edge of the second signal. V 1.0.4 JY5111 | jytek.com | 77...
- Page 78 2) Finite/Continuous Mode with Internal Sample Clock: The count values of rising edges of timebase between first signal and second signal are stored into buffer on each rising edge of the sample clock, as shown in Figure 77. V 1.0.4 JY5111 | jytek.com | 78...
- Page 79 Figure 78 Two-Edge Separation with Implicit Sample Clock Learn by Examples 8.8.5 ◼ Connect the signal source’s two positive terminals to PCIe-5111 first signal input (squarewave, CTR0_Gate/Z, Pin #10) and second signal input (squarewave, CTR0_AUX/B, Pin#43), two negative terminals to the ground (DGND, Pin#44) and (D_GND, Pin#9) as shown in Figure 3 and Figure 4.
- Page 80 ◼ Open Counter Input-->Winform CI Finite/Continuous TwoEdge Separation Measure and click Start. The result is shown below by First to Second(S) and Second to First(S), which represent the time difference between the rising edges of the two signals: V 1.0.4 JY5111 | jytek.com | 80...
- Page 81 Figure 80 Two-EdgeSeparation Measure For Finite Mode ➢ The result in this picture is similar to the result in Single Mode before. ➢ The table in the sample program is a connection diagram for your convenience. V 1.0.4 JY5111 | jytek.com | 81...
- Page 82 When A leads B, the count increase occurs on the rising edge and the falling edge of A; when B leads A, the count reduction occurs on the rising edge and falling edge of A as shown in Figure 82. Figure 82 Quadrature Encoder x2 Mode 3) x4 Encoding V 1.0.4 JY5111 | jytek.com | 82...
- Page 83 To configure the counter to work in this mode, set JY5111CITask. Mode to CIMode.Single. 2) Finite/Continuous Mode with Internal Sample Clock The count value is stored into the buffer on each rising edge of the sample clock, as shown in Figure 84. V 1.0.4 JY5111 | jytek.com | 83...
- Page 84 Figure 85 Quadrature Encoder x4 with Implicit Sample Clock Learn by Examples 8.8.6 ➢ Connect the signal source’s two positive terminals to PCIe-5111 first signal input (sinewave, CTR0_Source/A, Pin #11) and second signal input (squarewave , CTR0_AUX/B, Pin#43), two negative terminals to the ground (DGND, Pin#44) and (D_GND, Pin#9) as shown in Figure 3 and Figure 4.
- Page 85 ◼ When the encode type is changed from x1 to x2 and x4, you can see the rising speed of CounterValue is twice and four times than x1Mode. Continuous Mode ◼ Open Counter Input--> Winform CI Continuous QuadEncoder and click Start. The result is shown below by CounterValues. V 1.0.4 JY5111 | jytek.com | 85...
- Page 86 The count value increases on the rising edge of A and decreases on the rising edge of Timing 1) Single Mode The count value is written to the register on each rising edge of the signal A, and signal B, as shown in Figure 88. V 1.0.4 JY5111 | jytek.com | 86...
- Page 87 Figure 89. Figure 89 Two-Pulse Encoder with Internal Sample Clock 3) Finite/Continuous Mode with Implicit Sample Clock The count value is stored into the buffer every time it changed, as shown in Figure 90. V 1.0.4 JY5111 | jytek.com | 87...
- Page 88 Figure 90 Two-Pulse Encoder with Implicit Sample Clock Learn by Examples 8.8.7 ◼ Connect the signal source’s positive terminal to PCIe-5111 signal input (squarewave, CTR0_Source/A, Pin #11) ， negative terminal to the ground (DGND, Pin#44)。 ◼ Connect the PCIe-5111 signal input(CTR0_AUX/B, Pin#43)to ground (DGND, Pin#44).
- Page 89 ◼ Click Start to start counting. You can see a continuously rising of the Counter Value, which follows the counting rules explained in this chapter. Finite Mode ◼ Connect the signal source’s positive terminal to PCIe-5111 signal input (squarewave, CTR0_AUX/B, Pin#43) ， negative terminal to the ground (DGND, Pin#44)。...
- Page 90 ◼ Click Start to start counting. You can see that the CounterValue is decreasing, which follows the counting rules explained in this chapter. Continuous Mode ◼ Open Counter Input-->Winform CI Continuous Two PulseEncoder and set the numbers as shown. V 1.0.4 JY5111 | jytek.com | 90...
- Page 91 ➢ The table in the sample program is a connection diagram for your convenience. ◼ Click Start to start counting. You can see that the CounterValue is decreasing, which follows the counting rules explained in this chapter. V 1.0.4 JY5111 | jytek.com | 91...
- Page 92 Counter Output Operations 8.9. 8.9.1. Single Pulse Output The PCIe-5111 timer/counter can output a single pulse with a specified pulse width. The timing diagram of the pulse output is shown in Figure 94. Figure 94 Single Pulse Output In single pulse output mode, the user could set up the pulse width by configuring the frequency and duty cycle.
- Page 93 ◼ Please refer Learn by Example to configure an analog input to receive the signal from Counter Output. ◼ Click Start to generate a single pulse as shown. Figure 96 AI Acquisition Single Pulse V 1.0.4 JY5111 | jytek.com | 93...
- Page 94 1ms pulse width will be obtained. Learn by Example 0 ◼ To see the signal that PCIe-5111 Counter Output generates, it is recommended to connect PCIe-5111 Counter Output (CTR0_OUT, Pin#2) to PCIe-5111 AI Ch0 input (AI0+, Pin#68). Please note Counter Output and AI Ch0 input share the same ground so only one connection is needed.
- Page 95 Counter Output. ◼ Click Start to generate the pulse shown below. Figure 99 AI Acquisition Finite Pulse ➢ According to the picture, the duty cycle is 0.5 as set before. Continuous Pulse Output V 1.0.4 JY5111 | jytek.com | 95...
- Page 96 ◼ To see the signal that PCIe-5111 Counter Output generates, it is recommended to connect PCIe-5111 Counter Output (CTR0_OUT, Pin#2) to PCIe-5111 AI Ch0 input (AI0+, Pin#68). Please note Counter Output and AI Ch0 input share the same ground so only one connection is needed.
- Page 97 ➢ The table in the sample program is a connection diagram for your convenience. ➢ The frequency and duty cycle of the pulse are set by Frequency and Duty Cycle. ◼ Change the Duty Cycle to 0.7 for instance. The result is shown below. V 1.0.4 JY5111 | jytek.com | 97...
- Page 98 Figure 103 SSI Connector in PCIe-5111 Pin Signal Name Signal Name Pin PXI_TRIG0 PXI_TRIG1 PXI_TRIG2 PXI_TRIG3 PXI_TRIG4 PXI_TRIG5 PXI_TRIG6 PXI_TRIG7 Table 14 SSI Connector Pin Assignment for PCIe-5111 V 1.0.4 JY5111 | jytek.com | 98...
- Page 99 8.11. DIP Switch in PCIe-5111 PCIe-5111 series modules have a DIP switch. The card number can be adjusted manually by changing the DIP switch setting, which is used to identify the boards with different slot positions. 9. Calibration PCIe-5111 Series boards are precalibrated before the shipment. We recommend you recalibrate PCIe-5111 board periodically to ensure the measurement accuracy.
- Page 100 10.1.1. AI Accuracy The maximum AI accuracy is limited by three factors: Total Gain Error, Total Offset Error and the Noise Uncertainty as shown in the following table. The PCIe-5111 device is first calibrated. The test temperature is 23 ºC±5ºC.
- Page 101 10.1.2. AI Bandwidth Analog Input Bandwidth Nominal Range Full Scale (V) -3dB Bandwidth (MHz) ±10 3.26 ±5 2.77 ±2 1.39 ±1 0.78 ±0.5 0.78 ±0.2 0.72 ±0.1 0.63 Table 16 AI Bandwidth V 1.0.4 JY5111 | jytek.com | 101...
- Page 102 Figure 106 Common Mode Rejection Ratio 10.1.5. AO Accuracy The maximum AO accuracy is limited by two factors: Total Gain Error, Total Offset Error as shown in the following table. The PCIe-5111 device is first calibrated. The V 1.0.4 JY5111 | jytek.com...
- Page 103 Thus, the NRSE mode can handle twice as many channels as the DIFF mode. The three measurement modes and the two types of input signals, floating and ground referenced, form 6 different measurement scenarios as shown in the following. V 1.0.4 JY5111 | jytek.com | 103...
- Page 104 As a rule of thumb, R should be 1000 times of the signal source output impedance, roughly 10K to 100KΩ. At this level, R has very little impact on the measurement. V 1.0.4 JY5111 | jytek.com | 104...
- Page 105 11. About JYTEK 11.1. JYTEK China Founded in June 2016, JYTEK China is a leading Chinese test & measurement company, providing complete software and hardware products for the test and measurement industry. The company is a joint venture between Adlink Technologies and a group of experienced professionals form the industry.
- Page 106 11.2. JYTEK Korea and JYTEK in Other Countries JYTEK Korea was the first JYTEK enterprise outside China to promote JYTEK products. Together with Adlink Technologies and JYTEK China, JYTEK is expanding to other countries. Each JYTEK location is an independently owned and operated franchise. It shares JYTEK’s philosophy and business approach.
- Page 107 11.4. JYTEK Software Platform JYTEK has developed a complete software platform, SeeSharp Platform, for the test and measurement applications. We leverage the open sources communities to provide the software tools. Our platform software is also open sourced and is free, thus lowering the cost of tests for our customers.
- Page 108 12. Statement The hardware and software products described in this manual are provided by JYTEK China, or JYTEK in short. This manual provides the product review, quick start, some driver interface explanation for PCIe-5111 family of temperature sensor data acquisition cards. The manual is copyrighted by JYTEK.
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