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Sanyo LCD-40E40F Service Manual page 41

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5
Crystal Circuit
CLKIN
Y201
Y201
+3V3
R203
R203
CLKOUT
22R
22R
R205
R205
10K/0402
10K/0402
27MHz
27MHz
C202
C202
CRYSTAL\SMD\4MA
CRYSTAL\SMD\4MA
R206
R206
10K/0402
10K/0402
NC/10pF
NC/10pF
R207
R207
1M
1M
C203
C203
C204
C204
D
15pF
15pF
15pF
15pF
R211
R211
10K/0402/NC
10K/0402/NC
These components close to SPV7100
R246
R246
10K/0402
10K/0402
RESET
<11>
RESET
RESETN
<8>
RESETN
C205
C205
C206
C206
RXD
RXD
<2,8>
RXD
TXD
22pF
22pF
22pF
22pF
TXD
<2,8>
TXD
RESETN
IR_DAT
RESET
<8>
IR_DAT
WP#
R243
R243
33R
33R
SD1_FLASH
IR_DAT
<8>
SD1_FLASH
SD0_FLASH
SD1_FLASH
R213
R213
<8>
SD0_FLASH
CEN_FLASH
SD0_FLASH
R214
R214
CEN_FLASH
<8>
SCK_FLASH
CEN_FLASH
SCK_FLASH
<8>
SCK_FLASH
R215
R215
<8>
WP#
HOLD_FLASH
BL_ON
PANEL_ON
C208
C208
AUMCK
R218
R218
PC_WP
R221
R221
0/0402
0/0402
22pF
22pF
AUSD3
+DVDD
R220
R220
0/0402
0/0402
MCU_INT High
Keep current staus.
AUBCK
R222
R222
MCU_INT Low
TV turn off
+CVDD
AUWS
R223
R223
Add R255 for Fix AV out PO noise
R255
R255
0/0402
0/0402
<8>
AVout_Mute
R224
R224
0/0402/NC
0/0402/NC
MCU_INT
<8>
MCU_INT
MCU_INT
R225
R225
0/0402
0/0402
C
SDA_HDMI
BL_ADJ
<4>
SDA_HDMI
+3V3_XTAL
SCL_HDMI
<4>
SCL_HDMI
C209
C209
22pF
22pF
Chnage MCU_INT from pin 219 to pin72 2/8
Add LED_PWM_C 2/8
+1V8_AUD
RXCM
Del LED_PWM_C 3/10
<4>
RXCM
+3V3_TMDS
RXCP
<4>
RXCP
RXM0
<4>
RXM0
RXP0
<4>
RXP0
RXM1
<4>
RXM1
RXP1
<4>
RXP1
RXM2
<4>
RXM2
RXP2
<4>
RXP2
HS_VGA
<2>
HS_VGA
VS_VGA
<2>
VS_VGA
B_IN
<2>
B_IN
G_IN
<2>
G_IN
SOG_IN
<2>
SOG_IN
R_IN
*change value
<2>
R_IN
+CVDD
+3V3_ADCP
Y1_IN
<3>
Y1_IN
SOY1_IN
<3>
SOY1_IN
PB1_IN
C211 390pF
C211 390pF
FILT
<3>
PB1_IN
PR1_IN
<3>
PR1_IN
<8>
MCU_7100
C212
C212
R230
R230
8200pF
8200pF
5.6K
5.6K
B
These components close to SPV7100
CVBS0_IN
<3>
CVBS0_IN
CVBS1_IN
<3>
CVBS1_IN
CVBS2_IN
<3>
CVBS2_IN
CVBS3_IN
<10>
CVBS3_IN
C1_IN
<3>
C1_IN
SARIN0
<8>
SARIN0
Light_SEN
C213
C213
<8>
Light_SEN
AIN0L
1uF
1uF
<3>
AIN0L
AIN0R
<3>
AIN0R
AIN1L
GND_ADC
<3>
AIN1L
AIN1R
<3>
AIN1R
AIN2L
VCM_AUI
<3>
AIN2L
AIN2R
<3>
AIN2R
C231
C231
C232
C232
AIN3L
<3>
AIN3L
AIN3R
0.1uF
0.1uF
10uF/0805/10V
10uF/0805/10V
<3>
AIN3R
SIFAIN0R
<10>
SIFAIN0R
CVBSO
<3>
CVBSO
PC_WP
<2>
PC_WP
A
5
4
LVDS Output
RXD
+3V3_LVDS
TXD
Del R244 R245 12/16
GNDP
IR_DAT
MCU_INT
U201A
U201A
193
UART_TX
194
RESETN
195
PWM3/EXINT1
196
PWM2/WP_FLASH
197
IR_DAT
33R
33R
198
SD1_FLASH
33R
33R
199
SD0_FLASH
200
CEN_FLASH
33R
33R
201
SCK_FLASH
202
HOLD_FLASH
203
TESTMODE
204
DVSS33
205
I2SDA3/SPDIFO
206
I2SDA2/SPDIFI
0/0402
0/0402
207
I2SMCLKA/JCLK
208
I2SDA1/JTMS
209
I2SDA0/JTDO
210
DVDD33
0/0402
0/0402
211
I2SCLKA/JTDI
0/0402
0/0402
212
I2SWSA/JRSTN
213
DVDD18
HPD_HDMI
214
HPD_HDMI
MSDA_MCU_A
215
SDA_VGA
MSCL_MCU_A
216
SCL_VGA
SDA_HDMI
217
SDA_HDMI
SCL_HDMI
218
SCL_HDMI
219
PWM1//EXINT2
220
PWM0
221
DPLLVSS33
222
DPLLVDD33
223
AVDD33_REG
SPV7101
SPV7101
224
AVDD33_XTL
CLKIN
225
XTALI
CLKOUT
226
XTALO
227
PVSS18_AUD
228
PVDD18_AUD
229
PVSS33_TMDS
230
PVDD33_TMDS
231
AVDD33_TMDS
RXCM
232
RXCM
RXCP
233
RXCP
234
AVSS33_TMDS
235
AVDD33_TMDS
RXM0
236
RXM[0]
RXP0
237
RXP[0]
238
AVSS33_TMDS
239
AVDD33_TMDS
RXM1
240
RXM[1]
RXP1
241
RXP[1]
242
AVSS33_TMDS
243
AVDD33_TMDS
RXM2
244
RXM[2]
RXP2
245
RXP[2]
246
AVSS33_TMDS
247
DVSS18_TMDS
248
DVDD18_TMDS
249
PVDD33_ADC
250
FILT
251
PVSS33_ADC
252
HSYNC1
253
VSYNC1
HS_VGA
254
HSYNC0
VS_VGA
255
VSYNC0
MIDSCV
256
MIDSCV
GND_TMDS
GND_ADC
+1V8_ADCA_A
MIDSCV
VCM
C201
C201
TP208
TP208
TP205
TP205
TP207
TP207
1uF
1uF
TP206
TP206
GND_ADC
+3V3_ADCB
VCM_AUO
C233
C233
C234
C234
0.1uF
0.1uF
10uF/0805/10V
10uF/0805/10V
GND_AUO
R372
R372
75/NC
75/NC
VGA/YUV Input
Video Input
4
3
+CVDD
Memory I/O
DQS0H
DQM0H
*default NC
+CVDD
+1V25_0
10R
10R
10R
10R
GNDM
BA0
BA1
SVDD25
SVSS25
MA[10]
MA[0]
MA[1]
MA[2]
MA[3]
MA[4]
MA[5]
MA[6]
SVDD25
SVSS25
MA[7]
MA[8]
MA[9]
MA[11]
DLLVSS18
DLLVDD18
MPLLVDD33
MPLLVSS33
VSSR_1
VREF_1
GPIO/DQM1L
GPIO/DQS1L
I2SWSB/MD[16]
I2SCKB/MD[17]
I2SDB0/MD[18]
I2SDB1/MD[19]
SVDD
SVSS
I2SMCLKB/MD[20]
I2SDB2/MD[21]
CAFE
I2SDB3/MD[22]
PWM2/MD[23]
DVDD18
VDO[0]/MD[24]
VDO[1]/MD[25]
VDO[2]/MD[26]
VDO[3]/MD[27]
SVDD
SVSS
VDO[4]/MD[28]
VDO[5]/MD[29]
VDO[6]/MD[30]
VDO[7]/MD[31]
VCLKO/DQS1H
GPIO/DQM1H
DVDD18
DVSS
DVDD33
VD[0]
VD[1]
VD[2]
VD[3]
VD[4]
VD[5]
VD[6]
VD[7]
VCLK
SCL_M
SDA_M
DVDD18
GND_AUO
*Close to SPV7100
R150,C117;
R151,C118;
R148,C115;
R149,C116
+3V3_AUO
+CVDD
+DVDD
+3V3_AUI
+3V3_AUI
﹜ ﹜ ﹜ ﹜
*delete R136
R 137
Audio Input
Audio Output
Add R372 R373 1/28
3
2
IO Trap
<Trap0>
SCK_FLASH
R202
R202
NC/10K
NC/10K
(Pin-201)
CEN_FLASH
R204
R204
10K/0402/NC
10K/0402/NC
<Trap1>
(Pin-200)
HOLD_FLASH
R242
R242
10K/0402/NC
10K/0402/NC
(Pin-202)
HPD_HDMI
R210
R210
NC/10K
NC/10K
<Trap3>
(Pin-214)
+MVDD
(Pin-205)
CKE
R212
R212
4.7K
4.7K
<Trap5>
(Pin-164)
GNDM
Pin 116
﹜ ﹜ ﹜ ﹜
1 26
﹜ ﹜ ﹜ ﹜
1 39
﹜ ﹜ ﹜ ﹜
1 49
﹜ ﹜ ﹜ ﹜
1 59
妏 妏 妏 妏 妏 妏 妏 妏
S DRAM
奀 奀 奀 奀 奀 奀 奀 奀 奀 奀 奀 奀
3 .3V
BA0
DDR VREF
128
127
BA1
126
+1V25_0 +MVDD
125
124
MA10
MA0
123
MA1
122
121
MA2
MA3
R216
R216
120
119
MA4
MA5
4.7K_1%
4.7K_1%
118
MA6
117
116
115
114
MA7
C207
C207
MA8
113
R219
R219
MA9
+1V8_DLLVDD
112
4.7K_1%
4.7K_1%
111
MA11
0.1uF
0.1uF
+3V3_MPLL
110
109
+1V25_1
108
107
106
GNDM
105
DQM1L
104
103
DQS1L
Default Pull Setting
MD16
102
101
MD17
MD18
100
MD19
99
98
97
MD20
96
MD21
95
MD22
94
+CVDD
93
MD23
BL_ON
92
MD24
91
MD25
90
MD26
89
88
MD27
87
86
85
MD28
MD29
84
MD30
83
MD31
82
+DVDD
R249
R249
10R
10R
DQS1H
81
+CVDD
80
R252
R252
10R
10R
DQM1H
79
78
77
DCR/BRT
76
75
LVDS_SEL
MUTE_AMP
74
MUTE_HP
C210
C210
73
72
TCON_RDY
C290
C290
SW_CON
22pF
22pF
71
70
RESETN_HDMI
22pF
22pF
HDMI_5V_DET
69
HP_DET
68
67
SCL_M
SDA_M
66
65
Chnage MCU_INT from to Pin72
2/8
Chnage MCU_INT from Pin 72 to Pin219
3/22
* change C200-203 nets
GND_ADC
GND_TMDS
GNDP
GND_AUO
GNDM
*Short these ground planes on PCB
Title
Title
Title
Size
Size
Size
C
C
C
Date:
Date:
Date:
2
1
TX0M0
TX0M0
<9>
TX0P0
TX0P0
<9>
TX0M1
TX0M1
<9>
TX0P1
TX0P1
<9>
TX0M2
TX0M2
<9>
TX0P2
TX0P2
<9>
TXCLK0M
TXCLK0M
<9>
TXCLK0P
TXCLK0P
<9>
TX0M3
TX0M3
<9>
TX0P3
TX0P3
<9>
TX1M0
TX1M0
<9>
TX1P0
TX1P0
<9>
TX1M1
TX1M1
<9>
TX1P1
TX1P1
<9>
TX1M2
TX1M2
<9>
TX1P2
TX1P2
<9>
TXCLK1M
TXCLK1M
<9>
D
TXCLK1P
TXCLK1P
<9>
TX1M3
TX1M3
<9>
TX1P3
TX1P3
<9>
HOLD_FLASH
HOLD_FLASH
<8>
CKE
CKE
<5>
SDCLKP
SDCLKP
<5>
SDCLKN
SDCLKN
<5>
MD[0..15]
MD[0..15]
<5>
DDR VREF
DQS0L
DQS0L
<5>
DQM0L
DQM0L
<5>
+1V25_1 +MVDD
DQM0H
DQM0H
<5>
DQS0H
DQS0H
<5>
WEN
WEN
<5>
CASN
CASN
<5>
R247
R247
RASN
RASN
<5>
MA[0..11]
4.7K_1%
4.7K_1%
MA[0..11]
<5>
BA0
BA0
<5>
BA1
BA1
<5>
C271
C271
R248
R248
DQM1L
DQM1L
<5>
4.7K_1%
4.7K_1%
0.1uF
0.1uF
DQS1L
DQS1L
<5>
DQS1H
DQS1H
<5>
DQM1H
DQM1H
<5>
MD[16..31]
MD[16..31]
<5>
GNDM
C
+3V3
+3V3
+3V3
R226
R226
R227
R227
R254
R254
47K
47K
NC/10K
NC/10K
NC/10K
NC/10K
MUTE_AMP
MUTE_HP
R228
R228
R229
R229
R253
R253
NC/10K
NC/10K
10K/0402
10K/0402
10K/0402
10K/0402
DCR/BRT
DCR/BRT
<9>
LVDS_SEL
LVDS_SEL
<9>
SW_CON
SW_CON
<3>
RESETN_HDMI
RESETN_HDMI <4>
HDMI_5V_DET
HDMI_5V_DET
<4>
PANEL_ON
PANEL_ON
<12>
TCON_RDY
TCON_RDY
<12>
BL_ADJ
BL_ADJ
<12>
BL_ON
BL_ON
<12>
MUTE_AMP
MUTE_AMP
<11>
MUTE_HP
MUTE_HP
<11>
B
HP_DET
HP_DET
<3>
HPD_HDMI
HPD_HDMI
<4>
SCL_M
SCL_M
<4,8,11>
SDA_M
SDA_M
<4,8,11>
AOUT0L
AOUT0L
<3>
AOUT0R
AOUT0R
<3>
AUO_HPL
AUO_HPL
<11>
AUO_HPR
AUO_HPR
<11>
AUMCK
AUMCK
<11>
AUBCK
AUBCK
<11>
AUWS
AUWS
<11>
AUSD3
AUSD3
<11>
A
COMPAL OPTOELECTRONICS CO., LTD
COMPAL OPTOELECTRONICS CO., LTD
COMPAL OPTOELECTRONICS CO., LTD
SCHEMATIC, M/B VTV-L32020,SSB32S
SCHEMATIC, M/B VTV-L32020,SSB32S
SCHEMATIC, M/B VTV-L32020,SSB32S
Document Number
Document Number
Document Number
Rev
Rev
Rev
0A
0A
0A
401C2M
401C2M
401C2M
Monday, August 30, 2010
Monday, August 30, 2010
Monday, August 30, 2010
Sheet
Sheet
Sheet
7
7
7
of
of
of
15
15
15
1

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