15
ECSPI2_SS0
17
VDD_3V3
19
ECSPI1_MOSI
21
ECSPI1_MISO
23
ECSPI1_SCLK
25
GND
27
UART4-TXD
29
CAN2_RXD
31
GPIO5_IO04
33
GPIO5_IO03
35
I2C6_SCL
37
UART2-TXD
39
GND
As for the mapped functional definition of J2 40 pins on DEBIX I/O board, please refer to
DEBIX Model A Reduced GPIO Function List on website https://www.debix.io/.
Connection with DEBIX Model A
There is a group of I/O on the reverse side of I/O board, they are circled out with red line as
below:
www.debix.io
16
ECSPI2_MOSI
18
ECSPI2_MISO
20
GND
22
ECSPI2_SCLK
24
ECSPI1_SS0
26
GPIO1_IO11
28
UART4-RXD
30
GND
32
GPIO1_IO13
34
GND
36
UART2-RXD
38
GPIO3_IO21
40
CAN2_TXD
Figure 72
Polyhex Technology Co., Ltd.
55
108
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