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Section 4
Block Diagrams
Overall
CN-3725 BOARD
J3701
CN3701
RAW OUT
(RMON)2(SDI)_TXP0/TXN0
5, 6
IC3702
SDI
(RMON)2(SDI)_EN0
TRANSMITTER
8
: VIDEO SIGNAL
CN-3760 BOARD
FP-243
FLEXIBLE
J3802
BOARD
GENLOCK/IN
CN3801
CN2007
FB3802
(CN)2(L980)_REF_IN
4
11
REF_DET
6
9
J3803
REF OUT
SYNC_DET
7
8
FB3803
(A732)2(CN)_TEST_OUT
2
13
J3801
(CN)2(TC)_TC_SEL
TC IN/OUT
12
3
(TC)2(CN)_OUT
FB3801
CONTROL
10
5
(CN)2(TC)_IN
SWITCH
9
6
S3801
D3801
TALLY_LED_VCC
13
2
(ACCESS)
CN3003
REC_TALLY
2
DC OUT
REC_TRIGGER
3
XDCA-FS7
FP-244
HIF-68 BOARD
FLEXIBLE
CN2003
BOARD
(IC_2101)_2(SDI)_TXP0/TXN0
5, 6
(CN)2_(IC_2101)_EN0
3
IC2104
X2102
(CLK)2_(IC_2101)_148MP/148MN
5
DIFFERENTIAL
148.5MHz
LINE RECEIVER
(2/11)
IC2503
X2500
(IC_2101)_2(DDR3)_RFCLK_P/N
5
CLOCK DRIVER
100MHz
(6/11)
(IC_2101)_(DDR3)_DQ0 - DQ15
IC2501
(IC_2101)_2(DDR3)_DM0/DM1,
T2
DDR3 SDRAM
(IC_2101)_(DDR3)_DQS0_P/N,
(IC_2101)_(DDR3)_DQS1_P/N
(6/11)
(IC_2101)_2(DDR3)_A0 - A13,
(IC_2101)_2(DDR3)_BA0 - BA2
(IC_2101)_(DDR3)_DQ16 - DQ31
IC2502
T2
DDR3 SDRAM
(IC_2101)_2(DDR3)_DM2/DM3,
(6/11)
(IC_2101)_(DDR3)_DQS2_P/N,
(IC_2101)_(DDR3)_DQS3_P/N
(IC_2101)_2(DDR3)_CS/WE_X,
(IC_2101)_2(DDR3)_CAS/RAS_X,
(IC_2101)_2(DDR3)_ODT, (IC_2101)_2(DDR3)_CKE,
(IC_2101)_2(DDR3)_CLK0_P/N
(IC_2101)_2(DDR3)_RST_X
(IC_2101)_(TEMP)_SDA,
IC2802
(IC_2101)_2(TEMP)_SCL
TEMPERATURE SENSOR
(9/11)
IC2702
(L980)2_(IC_2101)_F/H/V
Q2701
VIDEO SYNC
SEPARATOR
(8/11)
Q2001
(CN)2_(IC_2101)_REFDET_X
Q2002
(CN)2_(IC_2101)_SYNCDET_X
(IC_2101)_2(A732)_HD_0 - 9,
(IC_2101)_2(A732)_SD_0 - 9
(IC_2101)_2(A732)_HD_B
IC2605
IC2603
25
(IC_2101)_2(A732)_HD_H
VIDEO SWTCH
VIDEO AMP
23
(7/11)
(IC_2101)_2(A732)_HD_V
(7/11)
24
IC2601
(IC_2101)_2(A732)_SD_B
48
DIGITAL VIDEO
(IC_2101)_2(A732)_SD_H
50
ENCODER
(IC_2101)_2(A732)_SD_V
49
(7/11)
(IC_2101)_2(A732)_HD_CLK74,
(IC_2101)_2(A732)_SD_CLK27
(IC_2101)_2(A732)_SDA,
(IC_2101)_2(A732)_SCL
(IC_2101)_2(A732)_RST_X
33
IC2604
(IC_2101)_2(CPST_C)_27M,
VIDEO SWTCH
(IC_2101)_2(SEl)_TEST_HDY
(7/11)
(IC_2101)_2(SEL)_TEST_CPST
(CN)2(TC)_TC_SEL
Q2003
LED DRIVE
Q3023
(BODY)2_(IC_101)_REC_TALLY
(IC_101)2(BODY)_REC_TRIGGER
(IC_2101)_2_(CN_100)_R_P0 - P5,
(IC_2101)_2_(CN_100)_R_N0 - N5
(IC_2101)_2_(CN_100)_G_P0 - P5,
(IC_2101)_2_(CN_100)_G_N0 - N5
(IC_2101)_2_(CN_100)_B_P0 - P3,
(IC_2101)_2_(CN_100)_B_N0 - N3
(IC_2101)_2_(CN_100)_G_CLKP/CLKN
(DIBL)2_(IC_2101)_PCIE_TX0_P/N
(IC_2101)_2(DIBL)_PCIE_RX0_P/N
(L983)2_(IC_2101)_REF_CLK3_74M
(L983)2_(IC_2101)_REF_CLK3_P/N
(IC_2101)_2_(CN_100)_HIF_RDY
(CN_100)_2_(IC_2101)_HIF_CLK
(CN_100)_2(MONI)_MONI0_TX0/TX1_P/N
IC2101
(CN_100)_2(MONI)_MONI1_TX0/TX1_P/N
FPGA
(2/11 - 6/11)
AD11
(IC_2101)2_(L983)_REF_H/V/F_IN
(CN_100)_2_(IC_2101)_IFVSYNC
(TMON)2_(IC_2101)_REF_24/HD/SD
(DIBL)2_(IC_101)_PCIE_RST_X
AK24
(IC_2101)_2_(CN_100)_IRQ0_X
(IC_101)_2(BODY)_ADAPTER_READY
(MONI)_(SPI)_D0
(MONI)_(SPI)_D1
(MONI)_(SPI)_D2
IC2304
(MONI)_(SPI)_D3
FLASH MEMORY
(MONI)2(SPI)_SCS
(4/11)
CLK
AB30
IC2306
(RMON)2(VUP)_DO
AE29
BUFFER
AB29
(4/11)
AD26
AK28
(VUP)2(RMON)_DI
AC26
IC2305
(VUP)2(RMON)_CLK/EN_X/PROG_B_2
BUFFER
(4/11)
IC2102
AJ28
(BUFF)2_(IC_2101)_PICE_REFCLK0_P/N
PCIECK_SRCP/SRCN
CLOCK BUFFER
(2/11)
X2201
R24
33.333MHz
(DIBL)2_(IC_101)_PCIE_REFCLK0_XEN,
(DIBL)2_(IC_101)_PCIE_REFCLK1_XEN
IC2704
(MONI)2_(TC)_TC_OUT
TIMECODE OUTPUT
(8/11)
IC2703
IC2705
(TC)2(MONI)_TC_IN
TIMECODE INPUT
(8/11)
(BODY)2_(IC_101)_REC_TALLY
(IC_101)2(BODY)_REC_TRIGGER
CA-89 BOARD
CN2001
CN102
(RMON)2_(CN_100)_R_P0 - P5,
(RMON)2_(CN_100)_R_N0 - N5
1 - 12
29 - 40
(RMON)2_(CN_100)_G_P0 - P5,
(RMON)2_(CN_100)_G_N0 - N5
15 - 26
15 - 26
(RMON)2_(CN_100)_B_P0 - P3,
(RMON)2_(CN_100)_B_N0 - N3
27 - 34
7 - 14
(RMON)2_(CN_100)_G_CLKP/CLKN
13, 14
27, 28
CN2002
CN101
(DIBL)2_(IC_2101)_PCIE_TX0_P/N
11, 12
11, 12
(IC_2101)_2(DIBL)_PCIE_RX0_P/N
13, 14
13, 14
(L983)2_(IC_2101)_REF_CLK1
(L983)2_(IC_2101)_REF_CLK1
20
20
(L983)2_(IC_2101)_REF_CLK3_74M
22
22
(L983)2_(IC_2101)_REF_CLK3_P/N
24, 25
24, 25
(BODY)_HIF_AD[0] - AD[7]
(BODY)_HIF_AD[0] - AD[7]
27 - 34
27 - 34
(CN_100)_HIF_CS_IC_2101_X
(CN_100)_HIF_CS_IC_2101_X
35
35
(IC_2101)_2_(CN_100)_HIF_RDY
36
36
(CN_100)_2_(IC_2101)_HIF_CLK
38
38
(CN_100)_2(MONI)_MONI0_TX0/TX1_P/N
2 - 5
2 - 5
(CN_100)_2(MONI)_MONI1_TX0/TX1_P/N
6 - 9
6 - 9
CN2004
CN105
(IC_2101)_(EQ)_SDA/SCL
(IC_2101)_(EQ)_SDA/SCL
1, 2
1, 2
(IC_2101)_2(L983)_REF_H/V/F_IN
22 - 24
22 - 24
(CN_100)_2(IC_2101)_IFVSYNC
18
18
(TMON)2_(IC_2101)_REF_24/HD/SD
26 - 28
26 - 28
(DIBL)2_(IC_101)_PCIE_RST_X
17
17
(IC_2101)_2_(CN_100)_IRQ0_X
20
20
(IC_2101)_2(DIBL)_IRQ1_X
(IC_2101)_2_(DIBL)_IRQ1_X
19
19
(IC_101)_2(BODY)_ADAPTER_READY
36
36
(RMON)2(VUP)_DO,
(VUP)2(RMON)_DI
(RMON)2(VUP)_DO, (VUP)2(RMON)_DI
9, 12
9, 12
(VUP)2(RMON)_CLK/EN_X/PROG_B_2
10,11,13
10,11,13
(VUP)2(RMON)_CS_X
(VUP)2(RMON)_CS_X
8
8
IC2103
CLOCK GENERATOR
(2/11)
6
5
X2101
25MHz
(DIBL)2_(IC_101)_PCIE_REFCLK0_XEN,
(DIBL)2_(IC_101)_PCIE_REFCLK1_XEN
15, 16
15, 16
(MONI)2_(TC)_TC_OUT,
(TC)2(MONI)_TC_IN
(MONI)2(TC)_TC_OUT, (TC)2(MONI)_TC_IN
29, 30
29, 30
(BODY)2(IC_101)_REC_TALLY
31
31
(IC_101)2(BODY)_REC_TRIGGER
32
32
CN100
78, 80
45, 47
53, 55
81
85
89, 91
21
19
17
(CN_100)_2_(IC_2101)_MONI_0_TX0/TX1_P/N
IC101
(CN_100)_2_(IC_2101)_MONI_1_TX0/TX1_P/N
RECORDER
INTERFACE
CAMERA
UNIT
103, 105,
107
109
97, 99,
101
71
41
39
131
4, 7
9,11,13
6
73, 75
3, 5
119
121
4-1
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