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High-performance Clock Generator Series
Clock Generator
with Built-in VCXO
for Audio/Video Equipments
BU2365FV
●Description
The ROHM Clock Generator is an IC allowing for the generation of multiple clocks by a single chip through the connection of
a single crystal oscillator. The BU2365FV incorporates the ROHM's unique PLL technology to provide the generation of
multiple high C/N clocks necessary for the DVD recorder system. This Clock Generator has the built-in high-precision
VCXO function and allows for high-precision synchronization with DVD Video clocks. It also has a built-in buffer having high
driving force and allows the supply of multiple 27MHz Video clocks for the system, thus providing the reduced number of the
system components.
●Features
1) The ROHM's unique PLL technology allows for the generation of high C/N clocks.
2) Built-in high precision VCXO, which is essential for the DVD recorder system
3) Built-in buffer having high driving force (Load capacity/output CL=50pF, 27MHz drive, 1×input / 2×outputs)
4) Built-in half pulse clock protection [HPC]
5) Built-in power down function, Icc=0 uA(typ.)
6) SSOP-B24 package
7) Single power supply of 3.3 V
●Application
DVD recorder
●
Absolute Maximum Ratings（Ta=25℃）
Parameter
Supply voltage
Input voltage
Storage temperature range
Power dissipation
*1 Operation is not guaranteed.
*2 In the case of exceeding Ta = 25℃, 8.2mW should be reduced per 1℃.
*3 The radiation-resistance design is not carried out.
*4 Power dissipation is measured when the IC is mounted to the printed circuit board.
TECHNICAL NOTE
Symbol
Limit
VDD
－0.3～7.0
VIN
－0.3～VDD+0.3
Tstg
－30～125
PD
820
Unit
Ｖ
Ｖ
℃
mW
Sep. 2008
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Summary of Contents for Rohm BU2365FV
- Page 1 ●Description The ROHM Clock Generator is an IC allowing for the generation of multiple clocks by a single chip through the connection of a single crystal oscillator. The BU2365FV incorporates the ROHM’s unique PLL technology to provide the generation of multiple high C/N clocks necessary for the DVD recorder system.
- Page 2 ●Recommended Operating Range Parameter Symbol Limit Unit Supply voltage 3.0～3.6 Ｖ Input H voltage VINH 0.8VDD～VDD Ｖ Input L voltage VINL 0.0～0.2VDD Ｖ Operating temperature Topr －10～70 ℃ Output load 22Pin / 19Pin CL_CLK768FS/384FS 32(MAX) 13Pin , 14Pin CL_BUFOUT 50(MAX) 18Pin / 24Pin CL_CLK512FS/54M 15(MAX)
- Page 3 The electrical characteristics shown above have been all evaluated with the use of the crystal oscillator NX5032GA (Spec. No. EXS00A-00278) manufactured by NIHON DEMPA KOGYO CO., LTD., under the conditions of Limiting resistance Rd=30Ωand Crystal oscillator load CL=10pF. Consequently, in order to use the BU2365FV, the said crystal oscillator is recommended. 9Pin： VDD_V 10Pin：...
- Page 4 ●Reference data (Basic data) RBW=1KHz VBW=100Hz 500psec／div 5.0nsec／div 10KHz／div Fig.3 33.8688MHz output Fig.4 33.8688MHz Period-Jitter Fig.5 33.8688MHz spectrum waveform VDD=3.3V,CL=32pF VDD=3.3V,CL=32pF VDD=3.3V,CL=32pF RBW=1KHz VBW=100Hz 10KHz／div 500psec／div 5.0nsec／div Fig.6 36.864MHz output Fig.7 36.864MHz Period-Jitter Fig.8 36.864MHz spectrum waveform VDD=3.3V,CL=32pF VDD=3.3V,CL=32pF VDD=3.3V,CL=32pF RBW=1KHz VBW=100Hz 10.0nsec／div...
- Page 5 ●Reference data (Basic data) RBW=1KHz VBW=100Hz 500psec／div 5.0nsec／div 10KHz／div Fig.15 54MHz output Fig.16 54MHz Period-Jitter Fig.17 54MHz spectrum waveform VDD=3.3V,CL=15pF VDD=3.3V,CL=15pF VDD=3.3V,CL=15pF RBW=1KHz VBW=100Hz 10KHz／div 500psec／div 5.0nsec／div Fig.18 BUF_OUT(27MHz) output Fig.19 BUF_OUT(27MHz) Period-Jitter Fig.20 BUF_OUT(27MHz) spectrum waveform VDD=3.3V,CL=50pF VDD=3.3V,CL=50pF VDD=3.3V,CL=50pF RBW=1KHz VBW=100Hz 10KHz／div...
- Page 6 ●Reference data (PLL: 33.8688MHz output Temperature and Supply voltage variations data) VDD=2.9V VDD=2.9V VDD=3.3V VDD=3.3V VDD=3.7V VDD=3.7V VDD=2.9V VDD=3.3V VDD=3.7V Temperature ： T [ ℃ ] Temperature：T [℃] Temperature：T [℃] Fig.27 33.8688MHz Fig.29 33.8688MHz Fig.28 33.8688MHz Temperature－Duty Temperature－fall-time Temperature－rise-time VDD=3.7V VDD=2.9V VDD=2.9V VDD=3.3V...
- Page 7 ●Reference data (PLL: 18.432MHz output Temperature and Supply voltage variations data) VDD=3.3V VDD=2.9V VDD=2.9V VDD=2.9V VDD=3.3V VDD=3.3V VDD=3.7V VDD=3.7V VDD=3.7V Temperature ： T [ ℃ ] Temperature：T [℃] Temperature：T [℃] Fig.39 18.432MHz Fig.37 18.432MHz Fig.38 18.432MHz Temperature－fall-time Temperature－Duty Temperature－rise-time VDD=2.9V VDD=2.9V VDD=3.3V VDD=3.3V...
- Page 8 ●Reference data (PLL: 54MHz output Temperature and Supply voltage variations data) VDD=2.9V VDD=2.9V VDD=3.3V VDD=2.9V VDD=3.3V VDD=3.7V VDD=3.3V VDD=3.7V VDD=3.7V Temperature ： T [ ℃ ] Temperature：T [℃] Temperature：T [℃] Fig.49 54MHz Fig.47 54MHz Fig.48 54MHz Temperature－fall-time Temperature－Duty Temperature－rise-time VDD=2.9V VDD=2.9V VDD=3.3V VDD=3.3V...
- Page 9 This data represents the central frequency as a deviation to the optimum frequency of 27.000000MHz. VDD=3.3V -100 0.55 1.1 1.65 2.2 2.75 3.3 Control Voltage：Vc [V] Fig.64 27MHz VCXO Control voltage – Frequency data ●Reference data (BU2365FV consumption current Temperature and Supply voltage variations data) VDD=3.7V VDD=3.3V VDD=2.9V VDD=3.7V VDD=3.3V VDD=2.9V...
- Page 10 ●Reference data (PLL : Long Term Jitter data) This data represents Period-Jitter at the 1000th cycle. 2.0nsec／div 2.0nsec／div 2.0nsec／div Fig.67 33.8688MHz Fig.68 36.864MHz Fig.69 54MHz Long Term Jitter Long Term Jitter Long Term Jitter ●Reference data (Period-Jitter MIN-MAX Output load CL dependence data) This data represents the output load up to two times as high as the maximum load of each output.
-
Page 11: Pin Function
●Block diagram, Pin assignment 3Pin：FSEL 22Pin：CLK768FS output PLL1 (FSEL=L：33.8688MHz) (FSEL=OPEN：36.864MHz) 7Pin：XTAL_IN 27.0000MHz 24Pin：CLK54M output 1: VDD54M 24: CLK54M VCXO PLL0 Crystal (54.0000MHz) 2: VSS54M 23: OE 8Pin：XTAL_OUT 3: FSEL 22: CLK768FS 10Pin：VCTRL PLL2 4: TEST 21: VDD H:PLL ON 5: AVDD 20: VSS L:PLL OFF 19Pin：CLK384FS output... - Page 12 Since the frequency of CLK512FS is divided into six portions in sync with the trailing edge of the PLL2 output, the CLK512FS will fall out of the phases of CLK768FS and CLK384FS by half cycle. As described above, the Audio clocks of the BU2365FV fall out of the phases each other, thus providing low jitter and noise levels.
- Page 13 ●Package Outline Lot No. B U 2 3 6 5 F V Fig.81 ●Equivalent circuit PIN No. Equivalent circuit of I/O PIN No. Equivalent circuit of I/O 3，23 13，14， (With 18，19， pull-up) 22，24 To the inside of IC From the inside of IC (With pull-down...
- Page 14 GND terminal. For EMI protection, it is effective to put ferrite beads in the origin of power supply to be fed to the BU2365FV from the substrate or to insert a capacitor (of 1Ω or less impedance), which bypasses high frequency desired, between the power supply and the GND terminal.
- Page 15 ●Cautions on use (1) Absolute Maximum Ratings An excess in the absolute maximum ratings, such as applied voltage (VDD or VIN), operating temperature range (Topr), etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc.
-
Page 16: Packing Specification
0.15 ± 0.1 0.65 0.22 ± 0.1 Direction of feed 1pin Reel (Unit:mm) ※When you order , please order in times the amount of package quantity. Catalog No.08T804A '08.9 ROHM ©... - Page 17 The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request.
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