United Technologies interlogix ACL805SUW-RDMF Installation Manual

ACL805SUW-RDMF - Surface Mount Keypad
with Mifare Reader - Installation Manual
Description / Operation
The ACL805SUW-RDMF is a multiprotocol digital keypad and
Mifare reader for access control applications with backlit keys
and selectable output protocol. These surface mount readers
includes a buzzer and a tri-color LED for state indication (access
granted, access denied or idle).
The ACL800SUW-RDMF has an automatic Wiegand output
(32 or 56 bit) and is capable of reading Mifare cards/fobs
(13.56 MHz).
Specifications
Operating voltage 9 to 14 VDC
Current consumption 110 mA at 12 VDC
Wiegand 32 or 56 bit,
Interface Mifare Reader
according to the ID length of the
card
32 data bits
Wiegand 32 description Pulse width: 100 µs
Pause: 1 ms
56 data bits
Wiegand 56 description Pulse width: 100 µs
Pause: 1 ms
Wiegand 26, 30, 34, 40, 42, 58 bit,
Interface Keypad
8 bit per key, 6 bit per key, 4 bit per
key
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even parity + 24 data bits + odd
parity
Pulse width: 100 µs
Pause: 1 ms
Wiegand 26 description
P1 = even parity calculated over the bits
2 to 13
P2 = odd parity calculated over the bits
14 to 25
even parity + 28 data bits + odd
parity
Pulse width: 100 µs
Wiegand 30 description Pause: 1 ms
P1 = even parity calculated over the bits
2 to 15
P2 = odd parity calculated over the bits
16 to 29
even parity + 32 data bits + odd
parity
Pulse width: 100 µs
Pause: 1 ms
Wiegand 34 description
P1 = even parity calculated over the bits
2 to 17
P2 = odd parity calculated over the bits
18 to 33
even parity + 38 data bits + odd
parity
Pulse width: 100 µs
Pause: 1 ms
Wiegand 40 description
P1 = even parity calculated over the bits
2 to 20
P2 = odd parity calculated over the bits
21 to 39
even parity + 40 data bits + odd
parity
Pulse width: 100 µs
Pause: 1 ms
Wiegand 42 description
P1 = even parity calculated over the bits
2 to 21
P2 = odd parity calculated over the bits
22 to 41
even parity + 56 data bits + odd
parity
Pulse width: 100 µs
Pause: 1 ms
Wiegand 58 description
P1 = even parity calculated over the bits
2 to 29
P2 = odd parity calculated over the bits
30 to 57
8 data bits (sent on each key
press)
Wiegand 8 bit per key
description Pulse width: 100 µs
Pause: 1 ms
P/N 1073514A• REV 01.01 • ISS 11SEP18