Philips TCM3.1A Service Manual page 29

8.5 Diagram B02, MX25L3205 (IC U10)
Block Diagram
SI
CS#, ACC,
WP#,HOLD#
SCLK
Pin Configuration
16-PIN SOP (300 mil)
HOLD#
1
VCC
2
NC
3
PO2
4
PO1
5
PO0
6
CS#
7
SO/PO7
8
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Address
Generator
Data
Register
SRAM
Buffer
Mode State
Logic Machine
Clock Generator
SCLK
16
SI
15
PO6
14
PO5
13
PO4
12
PO3
11
GND
10
WP#/ACC
9
Figure 8-5 Internal block diagram and pin configuration
IC Data Sheets TCM3.1A LA
Memory Array
Y-Decoder
Sense
Amplifier
HV
Generator
PIN DESCRIPTION
SYMBOL DESCRIPTION
CS# Chip Select
SI Serial Data Input
SO/PO7(1) Serial Data Output or Parallel Data
output/input
SCLK Clock Input
HOLD#(2) Hold, to pause the serial communication
(HOLD# is not for parallel mode)
WP#/ACC Write Protection: connect to GND;
12V for program/erase acceleration:
connect to 12V
VCC + 3.3V Power Supply
GND Ground
PO0~PO6 Parallel data output/input (PO0~PO6 can
be connected to NC in serial mode)
NC No Internal Connection
Note:
1. PO0~PO7 are not provided on 8-LAND SON package.
2. HOLD# is recommended to connect to VCC during
parallel mode.
8. EN 29
Output
Buffer
SO
18520_308_090325.eps
090325
2010-Jun-25