Lsi Pin Description （Lsi 端子機能表 - Yamaha ICP1 Service Manual

ICP1
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LSI PIN DESCRIPTION
HD6417727F160C (X2890B00) CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
ICS1893 (XZ658A00) PHY (Physical Layer) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
SIS60000F00A500 (X4834A00) Intelligent Network Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
ICS1893 (XZ658A00) PHY (Physical Layer)
PIN
NAME I/O
NO.
1 NOD/REP I Node / Repeater (Select).
2 10/100SEL I/O 10Base-T / 100Base-TX Select.
3 TP_CT
4 VSS Ground
5 TP_TXP O Twisted-Pair Transmit (Data) Positive.
6 TP_TXN O Twisted-Pair Transmit (Data) Negative.
7 VDD Power
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8 VDD Power
9 10TCSR I 10M Transmit Current Set Resistor.
10 100TCSR I 100M Transmit Current Set Resistor.
11 VSS Ground
12 VSS Ground
13 TP_RXP I Twisted-Pair Receive (Data) Positive.
14 TP_RXN I Twisted-Pair Receive (Data) Negative.
15 VDD Power
16 VDD Power
17 VSS Ground
18 RESETn I (System) Reset (Active Low).
19 MII/SI I Media Independent Interface / Stream Interface (Select).
20 NC N.C.
21 LSTA O Link Status.
22 VSS Ground
23 HW/SW I Hardware / Sofrtware (Select).
24 DPXSEL I/O Half-Duplex / Full-Duplex Select.
25 VDD Power
26 ANSEL I/O Auto-Negotiation Select.
27 LOCK O (Stream Cipher) Lock (Acquired).
28 VSS Ground
29 VSS Ground
30 MDIO I/O Management Data Input / Output.
31 MDC I Management Data Clock.
32 RXD3 O Receive Data 3.
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（LSI 端子機能表）
FUNCTION
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PIN
NAME I/O
NO.
33 RXD2 O Receive Data 2.
34 RXD1 O Receive Data 1.
35 RXD0 O Receive Data 0.
36 RXDV O Receive Data Valid.
37 VDD_IO Power
38 RXCLK O Receive Clock.
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39 RXER O Receive Error.
3 6 7 1 3 1 5
40 VSS Ground
41 RXTRI I Receive (Interface), Tri-State.
42 TXER I Transmit Error.
43 TXCLK O Transmit Clock.
44 TXEN I Transmit Enable.
45 TXD0 I Transmit Data 0.
46 TXD1 I Transmit Data 1.
47 TXD2 I Transmit Data 2.
48 TXD3 I Transmit Data 3.
49 COL O Collision (Detect).
50 CRS O Carrier Sense.
51 VDD_IO Power
52 REF_OUT I (Frequency) Reference Output.
53 REF_IN I (Frequency) Reference Input.
54 VDD Power
55 P0AC I/O PHY (Address Bit) 0 / Activity LED.
56 VSS Ground
57 VSS Ground
58 VSS Ground
59 P1CL I/O PHY (Address Bit) 1 / Collision LED.
60 P2LI I/O PHY (Address Bit) 2 / Link Integrity LED.
61 VSS Ground
62 P3TD I/O PHY (Address Bit) 3 / Transmit Data LED.
63 VDD Power
64 P4RD I/O PHY (Address Bit) 4 / Receive Data LED.
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DM: IC406
FUNCTION
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