Micrel MICRF506 Manual

Micrel MICRF506 Manual

410mhz and 450mhz ism band transceiver

Advertisement

Quick Links

General Description

The MICRF506 is a true single-chip, frequency shift keying
(FSK) transceiver intended for use in half-duplex,
bidirectional RF links. The multi-channeled FSK transceiver
is intended for UHF radio equipment in compliance with the
European Telecommunication Standard Institute (ETSI)
specification, EN300 220.
The transmitter consists of a PLL frequency synthesizer
and power amplifier. The frequency synthesizer consists of
a voltage-controlled oscillator (VCO), a crystal oscillator,
dual modulus prescaler, programmable frequency dividers,
and a phase-detector. The loop-filter is external for flexibility
and can be a simple passive circuit. The output power of
the power amplifier can be programmed to seven levels. A
lock-detect circuit detects when the PLL is in lock. In
receive mode, the PLL synthesizer generates the local
oscillator (LO) signal. The N, M, and A values that give the
LO frequency are stored in the N0, M0, and A0 registers.
The receiver is a zero intermediate frequency (IF) type
which makes channel filtering possible with low-power,
integrated low-pass filters. The receiver consists of a low
noise amplifier (LNA) that drives a quadrature mix pair. The
mixer outputs feed two identical signal channels in phase
quadrature. Each channel includes a pre-amplifier, a third
order Sallen-Key RC low-pass filter that protects the
following switched-capacitor filter from strong adjacent
channel signals, and a limiter. The main channel filter is a
switched-capacitor implementation of a six-pole elliptic low
pass filter. The cut-off frequency of the Sallen-Key RC filter
can be programmed to four different frequencies: 100kHz,
150kHz, 230kHz, and 340kHz. The I and Q channel
outputs are demodulated and produce a digital data output.
The demodulator detects the relative phase of the I and the
Q channel signal. If the I channel signal lags behind the Q
channel, the FSK tone frequency is above the LO
frequency (data '1'). If the I channel leads the Q channel,
the FSK tone is below the LO frequency (data '0'). The
output of the receiver is available on the DataIXO pin. A
receive signal strength indicator (RSSI) circuit indicates the
received signal level. All support documentation can be
found on Micrel's web site at www.micrel.com.
July 2006
MICRF506
410MHz and 450MHz ISM Band
Transceiver

Features

• True single chip transceiver
• Digital bit synchronizer
• Received signal strength indicator (RSSI)
• RX and TX power management
• Power down function
• Reference crystal tuning capabilities
• Frequency error estimator
• Baseband shaping
• Three-wire programmable serial interface
• Register read back function

Applications

• Telemetry
• Remote metering
• Wireless controller
• Remote data repeater
• Remote control systems
• Wireless modem
• Wireless security system
1
RadioWire®
M9999-092904
+1 408-944-0800

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the MICRF506 and is the answer not in the manual?

Questions and answers

Summary of Contents for Micrel MICRF506

  • Page 1: General Description

    MICRF506 410MHz and 450MHz ISM Band Transceiver General Description The MICRF506 is a true single-chip, frequency shift keying RadioWire® (FSK) transceiver intended for use in half-duplex, Features bidirectional RF links. The multi-channeled FSK transceiver • True single chip transceiver is intended for UHF radio equipment in compliance with the •...
  • Page 2: Table Of Contents

    Operating Ratings ..............................6 Electrical Characteristics ............................6 Programming ................................9 Writing to the control registers in MICRF506 ......................10 Writing to a Single Register ............................10 Writing to All Registers .............................11 Writing to n Registers having Incremental Addresses....................11 Writing to n Registers having Non-Incremental Addresses..................12 Reading from the control registers in MICRF506 .....................12...
  • Page 3 Micrel MICRF506BML/YML MICRF506BML/YML Land pattern ...........................31 Layout Considerations ..............................32 Package Information MICRF506BML........................33 Package Information MICRF506YML........................34 Overview of programming bit............................35 Table 1: Detailed description of programming bit.....................35 Table 2: Main Mode bit .............................40 Table 3: Synchronizer mode bit..........................40 Table 4: Modulation bit .............................40 Table 5: Prefilter bit..............................40...
  • Page 4: Radiowire® Rf Selection Guide

    300MHz – 440MHz 128k Baud 2.5 to 3.4V 45mA LQFP-44 MICRF505 850MHz – 950MHz 200k Baud 13mA 2.0 to 2.5V 28mA MLF™-32 MICRF506 410MHz – 450MHz 200k Baud 12mA 2.0 to 2.5V 21.5mA MLF™-32 MICRF405 290-980MHz 200k Baud 2.0-3.6V 18mA FSK/ASK MLF™-24...
  • Page 5: Pin Configuration

    Micrel MICRF506BML/YML Pin Configuration 32 3130 29 28 27 26 25 RFGND XTALOUT PTATBIAS XTALIN RFVDD RFGND SCLK RFGND DATAIXO DATACLK 9 10 11 12 13 14 15 16 MICRF506BML 32-Pin MLF Pin Description Pin Name Type Pin Function Pin Name...
  • Page 6: Absolute Maximum Ratings

    Micrel MICRF506BML/YML Absolute Maximum Ratings Operating Ratings Supply Voltage (V ) ........+2.7V Supply voltage (V ) ......+2.0V to +2.5V Voltage on any pin (GND = 0V)..-0.3V to 2.7V RF Frequencies ......410MHz to 450MHz Storage Temperature (T )....-55°C to +150°C Data Rate ..........
  • Page 7 Micrel MICRF506BML/YML Symbol Parameter Condition Units 38.4kbps, β = 2, 20dBc 125kbps, β = 2, 20dBc Occupied bandwidth 200kbps, β = 2, 20dBc Harmonics 434MHz Spurious Emission in Restricted ETSI EN300 220 bands < 1GHz (Using antenna matching network) Spurious Emission < 1GHz Spurious Emission >...
  • Page 8 Micrel MICRF506BML/YML Symbol Parameter Condition Units RSSI Dynamic Range Pin = -110dBm RSSI Output Range Pin = -60dBm Digital Inputs/Outputs Logic Input High 0.7V Logic Input Low 0.3V Clock/Data Frequency Clock/Data Duty Cycle Notes: 1. Exceeding the absolute maximum rating may damage the device.
  • Page 9: Programming

    SCLK line if the CS line is inactive. The bits. The value of an unused bit is “don’t care.” MICRF506 can be put on a bus, sharing clock and The control register with address 0 is referred to as data lines with other devices.
  • Page 10: Writing To The Control Registers In Micrf506

    “R/W” bit and “Values” into the MICRF506. Internal load pulse made here MICRF506 will sample the IO line at negative edges of SCLK. Make sure to change the state of the IO line before the negative edge. Refer to figures below.
  • Page 11: Writing To All Registers

    In addition, 22 octets with programming bits are entered. “Address” and “R/W bit” together make 1 octet. In total, 23 octets are clocked into the MICRF506. In addition, n octets with programming bits are entered. Totally, 1 +n octets are clocked into the MICRF506.
  • Page 12: Writing To N Registers Having Non-Incremental Addresses

    (or the first address to read 3-wire serial programming interface. from) can be any valid address (0-22). Reading is not destructive, i.e. values are not changed. The IO line is output from the MICRF506 (input to user) for a Tcsr traise Tper...
  • Page 13: Power On Reset

    Typ. Max. Power on Reset Tper Min. period of When applying voltage to the MICRF506 a power SCLK on reset state is entered. During the time period of Thigh Min. high time of power on reset, the MICRF506 should be...
  • Page 14: Programming Summary

    8 used programming bits as • SCLK is user-controlled. well. • Write to the MICRF506 at positive edges • Writing: Bring CS high, write address and (MICRF506 reads at negative edges). R/W bit followed by the new values to fill into the addressed control register(s) and bring •...
  • Page 15: Frequency Synthesizer

    The block diagram below shows the basic elements and arrangement of a PLL based frequency synthesizer. The MICRF506 has a dual modulus prescaler for increased frequency resolution. In a dual modulus prescaler the main divider is split into two parts, the main part N and an additional divider A, where A <...
  • Page 16: Crystal Oscillator (Xco)

    Micrel MICRF506BML/YML The lengths of the N, M, and A registers are 12, 12 parasitic and 6 respectively The values can be calculated from the following formula: parasitic capacitance input capacitance and PCB stray capacitance. Typically, × the total parasitic capacitance is around 6pF. For ×...
  • Page 17: Vco

    Micrel MICRF506BML/YML XCOtune Start-up Time (µs) A6..A0 0000011 ‘1’ ‘1’ ‘0’ VCO_IB2 VCO_IB1 VCO_IB0 VCO_freq1 VCO_freq0 The VCO has no external components. If has three bit to set the bias current and two bit to set the VCO frequency. These five bit are set by the RF...
  • Page 18: Charge Pump

    Input parameters Table 9. Loop Filter Components Values when designing the loop filter for the MICRF506 are mainly the modulation method and the bit rate. These choices will also affect the switching time and Lock Detect phase noise.
  • Page 19: Transceiver Sync/Non-Synchronous Mode

    The data to be transmitted will be sampled on MICRF506 will present data on rising edge and the rising edge of DATACLK. The micro controller can “USER” sample data on falling edge in receive therefore use the negative edge to change the data mode.
  • Page 20: Receiver

    Micrel MICRF506BML/YML Receiver The receiver is a zero intermediate frequency (IF) type in order to make channel filtering possible with low-power integrated low-pass filters. The receiver consists of a low noise amplifier (LNA) that drives a quadrature mixer pair. The mixer outputs feed two identical signal channels in phase quadrature.
  • Page 21: Switched Capacitor Filter

    Micrel MICRF506BML/YML Baudrate: The baud rate given is bit/sec Switched Capacitor Filter A6..A0 0001000 ‘1’ ScClk_X2 ‘0’ ScClk4 ScClk3 ScClk2 ScClk1 ScClk0 RSSI A6..A0 The main channel filter is a switched-capacitor 0000001 Modulation1 Modulation0 ‘0’ ‘0’ RSSI_en LD_en PF_FC1 PF_FC0 implementation of a six-pole elliptic low pass filter.
  • Page 22: Fee

    Micrel MICRF506 where FEE is the value stored in the FEE register, (Fp is the single sided frequency deviation, P is the A6..A0 number of symbols/data bit counted and R is the 0010101 FEEC_3 FEEC_2 FEEC_1 FEEC_0 symbol/data rate. A positive Foffset means that the...
  • Page 23: Bit Synchronizer

    Micrel MICRF506BML/YML Bit Synchronizer A6..A0 0000110 ModclkS2 ModclkS1 ModclkS0 BitSync_clkS2 BitSync_clkS1 BitSync_clkS0 BitRate_clkS2 0000111 BitRate_clkS1 BitRate_clkS0 RefClk_K5 RefClk_K4 RefClk_K3 RefClk_K2 RefClk_K1 RefClk_K0 A bit synchronizer can be enabled in receive mode where by selecting the synchronous mode (Sync_en=1). synchronizer clock...
  • Page 24: Transmitter

    Micrel MICRF506 Transmitter Power Amplifier A6..A0 0000000 LNA_by Sync_en Mode1 Mode0 Load_en 0000001 Modulation1 Modulation0 ‘0’ ‘0’ RSSI_en LD_en PF_FC1 PF_FC0 0000010 CP_HI SC_by ‘0’ PA_By OUTS3 OUTS2 OUTS1 OUTS0 The maximum output power is approximately 10dBm Frequency Modulation for a 50Ω load. For maximum output power the load A6..A0...
  • Page 25 Micrel MICRF506BML/YML When Modulation1 Modulation0 is 10, two sets of Table 12. Manchester Encoding divider values need to be programmed. The formula for calculating the M, N and A values is given in Another much more efficient encoding type is 3B4B chapter Frequency synthesizer.
  • Page 26: Modulator

    Micrel MICRF506BML/YML Modulator A6..A0 0000100 Mod_F2 Mod_F1 Mod_F0 Mod_I4 Mod_I3 Mod_I2 Mod_I1 Mod_I0 0000101 ‘0’ ‘1’ Mod_A3 Mod_A2 Mod_A1 Mod_A0 0000110 Mod_clkS2 Mod_clkS1 Mod_clkS0 BitSync_clkS2 BitSync_clkS1 BitSync_clkS0 BitRate_clkS2 0000111 BitRate_clkS1 BitRate_clkS0 RefClk_K5 RefClk_K4 RefClk_K3 RefClk_K2 RefClk_K1 RefClk_K0 modulator will create...
  • Page 27 Micrel MICRF506BML/YML Mod_la Mod_filter on Mod_lb Mod_filter off Mod_la > Mod_lb Figure 23. Modulator Waveform with and without Figure 21. Two Different Modulator Current Settings Filtering Mod_F=0 disables the modulator filter and Mod_F=7 Modulator Attenuator gives most filtering. Figure 22 shows a waveform A third way to set the deviation is by programming with and without the filter.
  • Page 28: Using The Xco-Tune Bits

    A procedure for using the XCO_tune feature in combination with the FEE is given below. The MICRF506 measures the frequency offset between the demodulated signal and the LO and tune the XCO so the LO frequency is equal to received carrier frequency.
  • Page 29 Micrel MICRF506BML/YML To avoid this situation, always make sure max count Read FEE is between limits. Suggestion: Count for 8 (or 16) bits only. FEE > 0? Procedure description: Yes --> XCO_Sign = POS In the procedure below, UP+DWN pulses are No -->...
  • Page 30: Typical Application

    50ohm line MLF32 12nH 47pF DATAIXO RFGND DATAlXO 15pF 18pF DATACLK DATACLK RFVDD RSSI 10nF MICRF506 – MLF32 Item Part Value Description Manufacturer Part Numner 10nF 10nF X7R ±10% 0603 50V Kyocera CM105X7R103K50A 100nF 100nF X7R ±10% 0603 16V Kyocera...
  • Page 31 Micrel MICRF506BML/YML MICRF506BML/YML Land pattern Figure below shows recommended land pattern. Red circles indicate Thermal/RFGND via’s. Recommended size is 0.300-0.350mm with a pitch of 1mm. The recommended minimum number of via’s are 9 and they should be directly connected to ground plane providing the best RF ground and thermal performance. For best yield plugged or open via’s should be used.
  • Page 32 Micrel MICRF506BML/YML Layout Considerations The MICRF506 is a highly integrated RF IC with only a few “hot” pins, however it is suggested to study available reference design on www.micrel.com before starting with schematics and layout. • To ensure the best RF design it is important to plan the layout and dedicate area for the different circuitry.
  • Page 33 Micrel MICRF506BML/YML Package Information MICRF506BML MICRF505BML 32-Pin MLF (B) July 2006 M9999-092904 +1 408-944-0800...
  • Page 34 Micrel MICRF506BML/YML Package Information MICRF506YML Side view Top view Bottom view Units 3.10±0.10 3.10±0.10 0.25 0.4±0.05 0.20 0.85±0.05 0.00~0.05 July 2006 M9999-092904 +1 408-944-0800...
  • Page 35 Micrel MICRF506BML/YML Overview of programming bit Address Data A6..A0 0000000 LNA_by Sync_en Mode1 Mode0 Load_en OL_opamp_en PA_LDc_en 0000001 Modulation1 Modulation0 RSSI_en LD_en PF_FC1 PF_FC0 (“0”) (”0”) VCO_by 0000010 CP_HI SC_by PA_by OUTS3 OUTS2 OUTS1 OUTS0 (“0”) IFBias_s IFA_HG VCO_BIAS_s 0000011...
  • Page 36 Micrel MICRF506BML/YML LD_en Lock detect function (1=enable) PF_FC1 Prefilter corner frequency 2.bit Ref. Table 5 PF_FC0 Prefilter corner frequency 1.bit Ref. Table 5 0000010 CP_HI High charge-pump current (0=125uA, 1=500uA) SC_by Bypass of Switched Capacitor filter (1=enable) VCO_by “0” mandatory. Bypass of VCO (1=enable)
  • Page 37 Micrel MICRF506BML/YML ScClk4 SwitchCap clock divider 5.bit, MSB ScClk3 SwitchCap clock divider 4.bit ScClk2 SwitchCap clock divider 3.bit ScClk1 SwitchCap clock divider 2.bit ScClk0 SwitchCap clock divider 1.bit, LSB “0” mandatory. Selects A, N and M divider output control of prescaler mode...
  • Page 38 Micrel MICRF506BML/YML --------- Reserved/not in use A1_5 A1-counter 6.bit A1_4 A1-counter 5.bit A1_3 A1-counter 4.bit A1_2 A1-counter 3.bit A1_1 A1-counter 2.bit A1_0 A1-counter 1.bit 0010000 --------- Reserved/not in use --------- Reserved/not in use --------- Reserved/not in use --------- Reserved/not in use N1_11 N1-counter 12.bit...
  • Page 39 Micrel MICRF506BML/YML 0010110 FEE_7 FEE value, bit 7, MSB FEE_6 FEE value, bit 6 FEE_5 FEE value, bit 5 FEE_4 FEE value, bit 4 FEE_3 FEE value, bit 3 FEE_2 FEE value, bit 2 FEE_1 FEE value, bit 1 FEE_0...
  • Page 40 Micrel MICRF506BML/YML Table 2: Main Mode bit Mode1 Mode0 State Comments Power down Keeps Register configuration Standby Crystal Oscillator running Receive Full Receive Transmit Full Transmit ex. PA stage Table 3: Synchronizer mode bit Sync_en State Comments Rx: Bit synchronization off...
  • Page 41 Micrel MICRF506BML/YML Table 6: Power amplifier bit State 21dB attenuation/PA off 18dB attenuation 15dB attenuation 12dB attenuation 9dB attenuation 6dB attenuation 3dB attenuation Max output PALDc_en PA is turned off by PA2=PA1=PA0=0 PA is turned on/off by Lock Detect, LD=1 -> PA on...
  • Page 42 (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.

Table of Contents