Related Manuals for TELink FR1
Summary of Contents for TELink FR1
- Page 1 Telink FR1 PCB Design Guideline AN-22051900-E1 Ver.1.0.0 2022/05/19 Keyword Layout, FR1, PCB Brief This is Telink FR1 PCB design guideline which mainly introduces considerations when designing FR1 boards.
- Page 2 All Rights Reserved Legal Disclaimer This document is provided as-is. Telink Semiconductor reserves the right to make improvements without further notice to this document or any products herein. This document may contain technical inaccuracies or typographical errors. Telink Semiconductor disclaims any and all liability for any errors, inaccuracies or incompleteness contained herein.
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Page 3: Revision History
Telink FR1 PCB Design Guideline Revision History Version Change Description Date Author Junyao MAO, V1.0.0 Initial release. 2022/05 Weixiang WANG AN-22051900-E1 Ver. 1.0.0... -
Page 4: Table Of Contents
Component and copper wire layer + carbon film alignment layer ........... 8 2.2.2 Component and copper wire layer + carbon film and copper wire layer ........9 Key Points of FR1 Board Design ....................10 Board layer ........................10 3.1.1 Board thickness selection .................... -
Page 5: List Of Figures
Figure 3-1 Stack structure ......................10 Figure 3-2 Carbon film routing ....................12 Figure 4-1 Package forms ......................13 Figure 4-2 Package design for Telink IC ..................14 Figure 4-3 Via hole on carbon film ....................15 Figure 4-4 Layout for RF circuit ....................16 Figure 4-5 Layout for power capacitors .................. -
Page 6: Overview
RF high harmonics, and etc. This document uses the Telink SoC chips as a basis and the remote control design as an example to illustrate how to guide the design of FR1 boards to achieve fast development and avoid multiple iterations. -
Page 7: Application Board Structure Id
2. Application Board Structure ID According to the complexity of the components, taking into account cost and the difficulty of routing, the the PCB design for Telink chips can be divided into single-layer boards or double-layer boards. 2.1 Single-layer board In single-layer board design, make sure that all components and keys can be placed on the same side and there should be enough space for the PCB antenna. -
Page 8: Doulbe-Layer Board
Telink FR1 PCB Design Guideline 2.2 Doulbe-layer board 2.2.1 Component and copper wire layer + carbon film routing layer One layer of this double-layer board is used to place components and route copper wire, and the other layer is for carbon film routing. For example, in a remote control design, we place the components on one layer and the keys on the other layer. -
Page 9: Component And Copper Wire Layer + Carbon Film And Copper Wire Layer
Telink FR1 PCB Design Guideline 2.2.2 Component and copper wire layer + carbon film and copper wire layer One layer of this double-layer board is used to place components and copper wire routing, and the other layer is for carbon film routing + copper wire routing. For example, in a remote control design, we place the components on one layer and the keys on the other layer. -
Page 10: Key Points Of Fr1 Board Design
3.1.2 Introduction of board structure In general, FR1 circuit board is single surface board, however, we need create another layer in addition to the Top layer and Bottom layer, called the carbon film layer. As shown in the figure below, the Key layer is the carbon film layer. -
Page 11: Carbon Film Routing
Telink FR1 PCB Design Guideline 3.2 Carbon film routing Carbon film routing is generally 1mm width routing, and the process of carbon film via hole is shown in the table below. Table 3-1 Design of carbon film via hole Requirement and... -
Page 12: Figure 3-2 Carbon Film Routing
Telink FR1 PCB Design Guideline Requirement and Process limit capabilities, which can lead to Item description reduced yields or increased production difficulties Distance between the edges of At least 0.9mm, distance from the edge of the ≥1.0mm adjacent copper plates on... -
Page 13: Layout Regulations
Figure 4-1 Package forms 4.2 Solder pads and via holes The PCB package design of Telink IC is as shown in Figure 4-2. The carbon film via hole is shown in Figure 4-3, the hole diameter is greater than 0.7mm, outer diameter 1.4mm. -
Page 14: Figure 4-2 Package Design For Telink Ic
Telink FR1 PCB Design Guideline Figure 4-2 Package design for Telink IC AN-22051900-E1 Ver. 1.0.0... -
Page 15: Notes
Telink FR1 PCB Design Guideline Figure 4-3 Via hole on carbon film 4.3 Notes First of all, the layout should consider the placement of the chip, based on the antenna, and reserve enough space for the antenna first, so as to determine the location of the chip. -
Page 16: Figure 4-4 Layout For Rf Circuit
Telink FR1 PCB Design Guideline Before supplying power to the chip, the power must be filtered through a capacitor. The power supply route is: the positive end of the battery spring tab → the filter capacitor → the power pin of the chip. -
Page 17: Figure 4-5 Layout For Power Capacitors
Telink FR1 PCB Design Guideline Figure 4-5 Layout for power capacitors AN-22051900-E1 Ver. 1.0.0... -
Page 18: Routing Notes
Keep the width of the carbon film routing at 1mm or more to reduce carbon film impedance. The ground is the main focus for FR1 board design. Due to the high current jumps during RF operation, the smaller the GND impedance, the better, to help reduce RF noise. -
Page 19: Figure 5-1 Routing Example 1
Telink FR1 PCB Design Guideline Figure 5-1 Routing example 1 In order to make a good connection between the chip and the ground and improve the RF performance, it can be connected to the system ground through the chip's four corner ground, as shown in the location of the red arrow in Figure 5-2. -
Page 20: Figure 5-3 Routing Example 3
Telink FR1 PCB Design Guideline After the overall routing is complete, for the copper plates where the ground plane is disconnected from the chip ground or power ground due to the routing, we should use 1206 package resistor to across the line to make it connected with the chip ground or power ground copper, as shown in Figure 5-3.
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