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MAIN(OP DRV) SCHEMATIC DIAGRAM
5
4
C4923
1µ
IC4902
1
2
3
MM1614GN-X
C4927
0.01u
L4902
10µ
REG_4.9V_IC4901
REG_4.9V
NQL38DK-100X
L4901
NQR0129-002X
REG_3.1V
C4902
10/6.3
T
GND
L4904
NQL38DK-100X
L4903
10µ
TO MAIN IF(CN103,112)
M_REG4.9
NQL38DK-100X
C4932
10/10
T
GND
R4987
0R0
TO P.PRCS
F/Z_RST
TO MAIN IF(CN105),
R4988
0R0
CAM_CLK
P.PRCS
R4989
0R0
TO P.PRCS
OP_CS
TO MAIN IF(CN105),
R4990
0R0
CAM_OUT
P.PRCS
TO P.PRCS
CLK27_AT
R4991 OPEN
VDIRS
TO GA,P.PRCS
R4992
0R0
CAM_VD
CAM_IN
TO P.PRCS
R4994
0R0
IRIS_PS
R4981
0R0
TO GA,P.PRCS
HDIRS
R4998
0R0
TO MAIN IF(CN112)
GATE_PLS
TO MAIN IF
IR_OUT
TL4901
TL4902
TL4903
TO V I/O
ASPECT
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
IC4903
R1100D311C-X
C4924
1µ
1
2
3
C4925
C4926
1µ
1µ
C4903
10/10
T
REG_3.1V_IC4901
C4935
C4936
10/10
0.01
T
C4934
OPEN
N.C.
N.C.
N.C.
Dch
N.C.
N.C.
DVSS
C4905
0.1
DVDD(3V)
RETB
SCK
TEST0
TEST1
MONI0
TEST2
CS
SIN
CLK
VD
R4993
SOUT
470
PDWNB
R4925
100K
HD
PLS1
PLS2
TL4915
R4944
MODESEL
0Ω
AVSS1
C4906
0.1
0
(No.YF139)2-23
R4908
4.7k
R4907
1M
C4910
R4904
OPEN
R4905
10k
C4908
15k
C4909
0.1
R4903
0.01
8.2k
R4906
C4907
680k
C4911
0.1
OPEN
CH
100p
N.C.
ADIN1
Cch
ADIN2
MONI
DAC12
AVSS3
AVDD3(5V)
IC4901
N.C.
JCY0223-X
N.C.
AVSS2
AVDD2(5V)
N.C.
Ach
Bch
N.C.
N.C.
N.C.
C4933
OPEN
2-24(No.YF139)
0
1
MAIN(OP DRV)
R4911
100
C4921
R4910
100
0.33µ
R4950
R4949
10K
R4945
5.6K
OPEN
C4912
0.1
CH
C4915
120p
R4924
12k
R4912
OPEN
OPEN
C4920
C4913
0.1
C4937
100p
OPEN
R4918
C4916
0.1
R4920
10k
yf139_y10625001a_rev0.1
Z_PTR_AD
TO P.PRCS
OP_THRMO
F_PTR_AD
TO OP BLOCK
CN106
QGF0549C1-24W
24 Z_LED
23 Z_PTR_AD
22 Z_VCC
21 DRIVE+
20 DRIVE-
19 DAMP-
18 GHout-
17 HGVss-
16 HGout+
15 HGVcc+
14 DAMP+
13 ZOOM04
12 ZOOM03
11 ZOOM02
10 ZOOM01
9 F_LED
8 F_VCC
7 OP_THRMO
6 GND
5 F_PTR_AD
4 FOCUS04
3 FOCUS03
2 FOCUS02
1 FOCUS01
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