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Zephyr SDRstick HF1 SDR User Manual

Receiver front-end
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UDPSDR-HF1 Receiver Front-end
User's Manual
Version 1.1 – 16 September 2013
© Copyright 2013 Zephyr Engineering, Inc
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  • Page 1 UDPSDR-HF1 Receiver Front-end User’s Manual Version 1.1 – 16 September 2013 © Copyright 2013 Zephyr Engineering, Inc Arrow.com. Downloaded from...

  • Page 2: Table Of Contents

    © Copyright 2013 Zephyr Engineering, Inc HARDWARE DESCRIPTION UDPSDR-HF1 C ONNECTORS 1.1.1 UDPSDR-HF1 C ONNECTORS SDK C ICRO ONNECTORS WITCHES AND 1.2.1 SDK C ICRO ONNECTORS 1.2.2 SDK LED ICRO 1.2.3 SDK S ICRO WITCHES QUICK START GUIDE DETAILED OPERATION QS1 –...

  • Page 3: Hardware Description

    © Copyright 2013 Zephyr Engineering, Inc 1 Hardware Description The following sections will help familiarize you with the setup and connections to your SDRstick HF1 SDR receiver. 1.1 UDPSDR-HF1 Connectors See Figure 1 for UDPSDR-HF1 connector locations. J3- OPT Power In...
  • Page 4 © Copyright 2013 Zephyr Engineering, Inc BeMicroSDK Pin 1 J1 Pin 1 Figure 2 - The correct HF1-BeMicroSDK pairing 1.1.1.2 J3 and J2 - Power In Power is supplied to the receiver in one of three ways (listed in most-to-least desirable order): USB, J3 or J2.

  • Page 5: Bemicrosdk Connectors, Switches And Leds

    © Copyright 2013 Zephyr Engineering, Inc NOTE: In order to use the USB port for power, the Altera USB Blaster driver must be loaded onto the PC. The BeMicroSDK will not even turn on until this driver is properly installed. No driver is required to power the receiver from J3 or J2. See the Quick Start Guide.

  • Page 6: Bemicrosdk Leds

    © Copyright 2013 Zephyr Engineering, Inc 1.2.1.1 USB Connector (X201) The USB connector is used to program both the FPGA configuration RAM and the BeMicroSDK configuration flash memory. The BeMicroSDK appears to the host PC as an Altera Byte Blaster.
  • Page 7 © Copyright 2013 Zephyr Engineering, Inc V701 – Power V703 – CONF_DONE V704 – PWREN2# Figure 5 - BeMicroSDK Status LEDs 1.2.2.2 User LEDs (LED1 – LED8) The eight user LEDs (LED1 – LED8) are under FPGA firmware control. Since the function of these LEDs is defined by the FPGA firmware, they can have any desired meaning.

  • Page 8: Bemicrosdk Switches

    © Copyright 2013 Zephyr Engineering, Inc LED8 – ADC Overload LED7 – Internal FIFO Overflow LED6 – not used LED5 – not used LED4 – not used LED3 – not used LED2 – UDPSDR-HF1 Clock Heartbeat LED1 – BeMicroSDK Clock Heartbeat Figure 6- BeMicroSDK User LEDs 1.2.3 BeMicroSDK Switches...
  • Page 9 © Copyright 2013 Zephyr Engineering, Inc S504 – not used S503 – FPGA Reset S502 - Reconfiguration SW1-2 not used SW1-1 not used Figure 7 - BeMicroSDK Switches 1.2.3.2 Slide Switches (SW1-1, SW1-2) The two slide switches, SW1-1 (bottom) and SW1-2 (top), can be read under FPGA firmware control.

  • Page 10: Quick Start Guide

    © Copyright 2013 Zephyr Engineering, Inc 2 Quick Start Guide This quick start guide will lead you through the steps to get your SDRstick receiver operating. Please refer to Section 3 for in-depth information on each of these steps. If your BeMicroSDK came pre-programmed from the factory, you can skip steps QS1 and QS3.

  • Page 11: Step Qs1 - Download And Install Programming Software

    © Copyright 2013 Zephyr Engineering, Inc  Install applications  Check system information and update hardware drivers  Enable/disable both wired and wireless network ports  Change PC IP address and network mask  Enable and disable PC DHCP client ...

  • Page 12: Download And Install Software

    © Copyright 2013 Zephyr Engineering, Inc the FPGA configuration SRAM can be overwritten with a new firmware load from the USB port at any time.) For the SDRstick HF1 receiver to work immediately on power-up, the BeMicroSDK configuration flash ROM must be programmed with the FPGA firmware load.

  • Page 13: Step Qs2 - Install Usb Blaster Driver

    © Copyright 2013 Zephyr Engineering, Inc <svn.sdrstick.com>. Sections 2.4 and 2.5 of the lab walk you through the Quartus II Web Edition and USB Blaster driver installation. 3.1.2.1 Quartus II Web Edition This is an extremely large download (about 4.4GB). Unless you have a fast connection to the Internet, it will take a long time to download.

  • Page 14: Step Qs3 - Program Bemicrosdk

    © Copyright 2013 Zephyr Engineering, Inc NOTE: The USB Blaster driver is not available as a separate download. If you intend to power your SDRstick from the USB port, you must download and install either the Quartus II Web Edition or the Quartus II Programmer software.

  • Page 15: Qs3A - Creating A User Flash Block File

    © Copyright 2013 Zephyr Engineering, Inc 3.3.2 QS3a – Creating a User Flash Block File When SDRstick Programmer is opened, the Create UFB pane contains a default MAC address of 00:07:ed:fc:fd:fe, a default IP address of 192.168.1.26 and the DHCP client turned off.

  • Page 16: Step Qs4 - Make External Connections

    © Copyright 2013 Zephyr Engineering, Inc (I.e., it was not programmed into the configuration flash ROM), then the MAC address is set to 00:07:ed:01:23:45. This is in the Altera block of IP addresses with the last three octets set to 0x012345.

  • Page 17: Step Qs5 - Install And Run Gui Software

    © Copyright 2013 Zephyr Engineering, Inc Note: Clean power is especially important given the high sensitivity of this receiver. USB power is not noted for its purity. If you experience excessive receiver noise while on USB power, especially at lower frequencies, consider using a well-filtered external power supply instead.

  • Page 18: Sdr

    © Copyright 2013 Zephyr Engineering, Inc bottom of the left column, you will see a dialog box. Click on the small down-arrow and you will be presented with two selections, “384000” (384Ksps) and “1250000” (1.25Msps). There are two reasons that you might want to select the lower sampling rate. The lower sampling rate requires less CPU resources, so you might want to choose a lower rate if you PC is slower or older.

  • Page 19: Gnuradio

    © Copyright 2013 Zephyr Engineering, Inc Process Priority. Under the <Audio><Primary> tab, select 384000 in the Sample Rate box. Under the <Audio><VAC1> tab, click the Enable VAC 1 check box. Close the Setup window and click the Power button and you are on the air! If you go back to the Setup window now, under the <General><Hardware Config>...

  • Page 20: Troubleshooting

    © Copyright 2013 Zephyr Engineering, Inc 4 Troubleshooting Some of the more common problems and their solutions are outlined in the following sections. If you are still stuck after reading through this chapter, please log onto the SDRstick Yahoo group and ask for help.

  • Page 21: Extio.dll Not In Correct Directory

    © Copyright 2013 Zephyr Engineering, Inc SDRstick . Since SDRstick discovery is a broadcast, it may succeed even though it is on a subnet that is unreachable by the PC. Make sure that all MAC and IP addresses on the entire network are unique, and that all IP address bits with a “1” in the network mask are the same.

  • Page 22: Updsdr-Hf1 Fpga Code

    © Copyright 2013 Zephyr Engineering, Inc LOW-PASS ANTI ALI AS 14b@ 80MS PS FI LTER FI LTER D RI VER EXTERN AL 30 MH z 30 MH z 20dB ANTENN A PW R 80MHz PR OT C LK OU T...

  • Page 23: Specifications

    © Copyright 2013 Zephyr Engineering, Inc An internal NIOS soft-core CPU controls all of the processes and the data flow. The NIOS CPU also controls the boot loader functions and external flash memory programming operations, not shown. 6 Specifications  Frequency Range: 100kHz to 30MHz, Digital Direct Sampling (DDS) ...

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