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XIA PIXIE-16 User Manual

Digital gamma finder
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User's Manual
Digital Gamma Finder (DGF)
PIXIE-16
Version 1.40, October 2009
XIA LLC
31057 Genstar Rd.
Hayward, CA 94544 USA
Phone: (510) 401-5760; Fax: (510) 401-5761
http://www.xia.com

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  • Page 1 User's Manual Digital Gamma Finder (DGF) PIXIE-16 Version 1.40, October 2009 XIA LLC 31057 Genstar Rd. Hayward, CA 94544 USA Phone: (510) 401-5760; Fax: (510) 401-5761 http://www.xia.com...
  • Page 2 No license is granted by implication or otherwise under the patent rights of XIA. XIA reserves the right to change the DGF product, its documentation, and the supporting software without prior notice.

  • Page 3: Table Of Contents

    DATA RUNS AND DATA STRUCTURES ....................19 ..............................19 UN TYPES 4.1.1 Histogram Runs ...........................19 4.1.2 List Mode Runs ............................19 ........................19 UTPUT DATA STRUCTURES 4.2.1 MCA histogram data..........................19 4.2.2 List mode data............................19 HARDWARE DESCRIPTION........................23 PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.
  • Page 4 Trigger Distribution between Chassis ....................39 ...........................39 YNCHRONIZATION TROUBLESHOOTING ..........................40 ..........................40 TARTUP ROBLEMS APPENDIX A ..............................41 ..............................41 UMPERS .......................41 BACKPLANE PIN FUNCTIONS ..................42 INOUT OF IGITAL RONT ANEL ONNECTORS PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.

  • Page 5: Safety

    DGF-Pixie-16 from the crate! Servicing and Cleaning To avoid personal injury, and/or damage to the DGF-Pixie-16, do not attempt to repair or clean the unit. The DGF hardware is warranted against all defects for 1 year. Please contact the factory or your distributor before returning items for service.

  • Page 6: End Users Agreement

    In order to obtain service under this warranty, Customer must notify XIA LLC of the defect before the expiration of the warranty period and make suitable arrangements for the performance of the service.

  • Page 7: Overview

    109 Mbyte/s. The standard PXI backplane, as well as additional custom backplane connections are used to distribute clocks and trigger signals between several Pixie-16 modules for group operation. A complete data acquisition and processing systems can be built by combining Pixie- 16 modules with commercially available CompactPCI/PXI processor, controller or I/O modules in the same chassis.

  • Page 8: Specifications

    Two software selectable analog gains: 4 and 0.9 (by 1:0.22 attenuation). Optional +/- 10% digital gain for gain matching between channels. Offset DC offset adjustment from –1.5V to +1.5V, in 65536 steps. PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.
  • Page 9 256K×18bit FIFO memory for list mode data Statistics Real time, live time, input and output counts. Event data Hit pattern, pulse height (energy), timestamps, pulse shape analysis results, and waveform data. PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.

  • Page 10: Setting Up

    8-slot and a 14-slot chassis; please inquire for further options. Put the host computer (or remote PXI controller) in the system slot (slot 1) of your chassis. Put the Pixie-16 modules into any free peripheral slot (slot 2-8 or 2-14) with the chassis still powered down. After modules are installed, power up the chassis (Pixie-16 modules are not hot swappable).

  • Page 11: Settings

    Pixie-16 modules initialized. For analysis-only operation with no modules, check the Offline Analysis box before booting. 2.2.2 Settings To configure the modules for your detector, go to the Settings tab. Click on the Acquire ADC Traces button to view the input signal for either a single channel or for all 16 channels of the Module selected at the bottom of the panel.

  • Page 12: Navigating The Pixie-16 User Interface

    3 Navigating the Pixie-16 User Interface 3.1 Overview The Pixie-16 graphical user interface (Figure 3.1) provides the user a simple tool to control the Pixie-16 cards. It was written using Microsoft’s Visual Basic programming language and its underlying function calls are directed to two dynamic link library (DLL) files, Pixie16AppDLL.dll and Pixie16SysDLL.dll.

  • Page 13: Startup

    Figure 3.2: The boot files and path selection panel. When the files and paths are set correctly, click the button Boot Pixie-16 Modules. You should hear several clicks from the modules as the gain relays are reset, then the bottom status line should show a green marker indicating that the Pixie-16 modules initialized.

  • Page 14: Settings

    “Pixie16msg.txt” and can be sent to XIA for support. It is located in the same folder as the user interface program Pixie16_VB.exe. For analysis-only operation with no modules, check the Offline Analysis box before booting.

  • Page 15: Analog Signal Conditioning & Acquire Adc Traces

    If there is clipping, adjust the Gain and Offset or click on the Adjust Offsets button to let the software set the DC offsets to proper levels. PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.

  • Page 16: Histogram Control

    Emin is reserved for a future function to subtract a constant “minimum energy” from the computed energy value before binning to essentially cut off the lower end of the spectrum. PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.

  • Page 17: Decay Time

    3.3.6 Baseline Control & Acquire Baselines The Pixie-16 constantly takes baseline measurements when no pulse is detected and keeps a baseline average to be subtracted from the energy filter output during pulse height reconstruction.

  • Page 18: Cfd Trigger

    “Accept external trigger and run inhibit signals” option enabled. This should be enabled for only one module in the crate. f) Multiple crates. This option is only used when multiple Pixie-16 crates communicate with each other. 2. Channel Control Register A a) Good channel.

  • Page 19: Trigger Stretch Lengths

    16 channels of a Pixie-16 module can be distributed to its immediate neighbors through the PXI backplane. Thus a group of up to 48 fast trigger signals can be formed within one Pixie-16 module by combining all fast triggers from the module itself and its two immediate neighbors.
  • Page 20 Furthermore, up to 16 such groups can be formed within one Pixie-16 module, and each group can have each of its 48 fast trigger signals enabled or disabled by using a user defined contribution mask (48-bit). It should be pointed out that two neighboring modules share the 16 nearest neighbor lines between them, i.e., if for instance one module sends 5 channels’...

  • Page 21: Qdc

    Eight QDC sums, each of which can have different length varying from 10 ns to 327.68 µs, are computed in the signal processing FPGA of a Pixie-16 module for each channel and the sums are written to the output data stream if the user requests so. The recording of QDC sums starts at...

  • Page 22: Results

    Only those channels that were set to “Good channel” will have valid energy and traces if “Capture trace” is enabled. You can scroll through the events using the Select event number control. PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.
  • Page 23 Figure 3.6: The MCA spectrum display panel. PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.
  • Page 24 Figure 3.7: The list mode data display panel. PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.

  • Page 25: Data Runs And Data Structures

    Pixie-16 in multi-parametric or list mode. In list mode, you still obtain histogramming of energies, e.g. for monitoring purposes. Runs will continue until a user manually stops the run.
  • Page 26 Energy sum - gap [31:0] Baseline value Baseline 4.2.2.2 Recording of QDC sums ENABLED Index Data Description [31:0] QDC sum #0 QDCSum0 [31:0] QDC sum #1 QDCSum1 PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.
  • Page 27 QDC sum #1 QDCSum1 [31:0] QDC sum #2 QDCSum2 [31:0] QDC sum #3 QDCSum3 [31:0] QDC sum #4 QDCSum4 [31:0] QDC sum #5 QDCSum5 [31:0] QDC sum #6 QDCSum6 PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.
  • Page 28 ADC Data Not used Not used [31:28] [27:16] [15:12] [11:0] Packing of ADC Data #2 and #3 ADC Data ADC Data Not used Not used … … PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.

  • Page 29: Hardware Description

    ADC is thus ~500mV. For 1:0.22 attenuation, the overall gain reduces to ~0.9 and thus the dynamic range is 2.22V. Though the Pixie-16 can work with many different signal forms, best performance is to be expected when sending the output from a charge integrating preamplifier directly to the Pixie-16 without any further shaping.

  • Page 30: Digital Signal Processor (Dsp)

    DSP sends the event data to the external FIFO memory. 5.3 Digital signal processor (DSP) The DSP controls the operation of the Pixie-16, reads raw data from the Trigger/Filter FPGAs, reconstructs true pulse heights, applies time stamps, prepares data for output to the host computer, and increments spectra in the on-board memory.

  • Page 31: Pci And Trigger Interface

    PCI slave IC together with an FPGA. The configuration of this PCI IC is stored in a PROM, which is placed in the only DIP-8 IC-socket on the Pixie-16 board. The interface conforms to the commercial PCI standard. It moves 32-bit data words at a time.

  • Page 32: Theory Of Operation

    “Length” (the “Gap” region is omitted because the signal is changing rapidly here), and their difference taken as a measure of V . Thus the value V may be found from the equation: PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.
  • Page 33 (usually from stored coefficients) normalized W } sets on a pulse by pulse basis. The Pixie-16 takes a different approach because it was optimized for very high speed operation. It implements a fixed length filter with all W values equal to unity and in fact computes this sum afresh for each new signal value k.

  • Page 34: Trapezoidal Filtering In The Pixie-16

    From this point onward, we will only consider trapezoidal filtering as it is implemented in the Pixie-16 according to Eqn. 6. The result of applying such a filter with Length L=1 µ s and Gap G=0.4 µ s to a γ -ray event is shown in Figure 6.3. The filter output is clearly trapezoidal in shape and has a rise time equal to L, a flattop equal to G, and a symmetrical fall time equal to L.

  • Page 35: Baselines And Preamplifier Decay Times

    Achieving this in the mixed analog-digital environment of a digital pulse processor is a non-trivial task, however. PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.

  • Page 36: Thresholds And Pile-Up Inspection

    All that is required is to take the filter sums, reconstruct the energy V and add it to the spectrum. In the Pixie-16, the filter sums are continuously updated by the RTPU (see section 5.2), and only have to be read out by the DSP when an event occurs. Reconstructing the energy and incrementing the spectrum is done by the DSP, so that the RTPU is ready to take new data immediately after the readout.
  • Page 37 Figure 6.5: Peak detection and sampling in the Pixie-16. The peak detection and sampling in the Pixie-16 is handled as indicated in Figure 6.5. Two trapezoidal filters are implemented, a fast filter and a slow filter . The fast filter is used to detect the arrival of γ...
  • Page 38 Because the fast filter rise time is only 0.1 µ s, these γ -ray pulses do not pileup in the fast filter channel. The Pixie-16 can therefore test for slow channel pileup by measuring the fast filter for the interval PEAKSEP after a pulse arrival time. If no second pulse occurs in this interval, then there is no trailing edge pileup.

  • Page 39: Filter Range

    DSP has to be set to select a particular range. For detectors with even slower time constants, the Pixie-16 can be loaded with different firmware files that perform even higher averaging. This allows pulses with decay times in the millisecond range to be processed.

  • Page 40: Operating Multiple Pixie-16 Modules Synchronously

    “FP” pin and setting jumper JP5 to “Clk”. 7.1.1 Individual Clock mode If only one Pixie-16 module is used in the system, or if clocks between modules do not have to be synchronized, the module should be set into individual clock mode, as shown in Figure 7.1a.

  • Page 41: Daisy-Chained Clock Mode

    Though the 10MHz is too slow to be a useful clock for the Pixie-16, it can be overridden by a signal from a module in slot 2. The Pixie-16 can be configured to be the PXI clock master in slot 2, by connecting pins 6 and 8 (Loc –...

  • Page 42: Front Panel Digital I/Oport Pin

    7.3 Front panel digital I/O port pin To aid system setup by a user or for debugging purpose, Pixie-16 provides up to six test pins (outputs) through the front panel connector J100. The test pins can be connected to various internal signals of the Pixie-16 to provide insight of the current status of the system.

  • Page 43: Sample Signals For Front Panel Test Pins

    D2, was disabled due to the existence of the stretched veto window in D3. Signal # Signal Name (DIRECTOR) PULSER PULSE FTRIG_DELAY FTRIG_VAL ETRIG_CE VETO_CE CHANTRIG[0] VETO_IN[0] PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.
  • Page 44 Figure 7.5: Sample timing diagram showing an event vetoed by the Veto signal. This event was vetoed since stretched veto window (D3) was open when delayed fast trigger (D0) arrived. PIXIE-16 User’s Manual V1.40 © © © © XIA 2009. All rights reserved.

  • Page 45: Trigger Distribution

    See the user manual for the P16Trigger module for details. 7.6 Run Synchronization It is possible to make all Pixie-16 modules in a system start and stop runs at the same time by using a wired-OR SYNC line on the PXI backplane. The run synchronization works as follows.

  • Page 46: Troubleshooting

    2. Computer reports new hardware found, needs driver files Whenever a Pixie-16 module is installed in a slot of the chassis for the first time, it is detected as new hardware, even if Pixie-16 modules have been installed in other slots previously.

  • Page 47: Jumpers

    P16Trigger board) Table 9.1: On-board jumper settings for the clock distribution on Pixie-16 modules. Pin 1 is at the upper left. To use the front panel input instead of the local clock, connect use pin 5 instead of pin 8 and set JP 5 to “Clk”.

  • Page 48: Pinout Of Digital Front Panel Connectors

    PXI Clock Table 9.2 : Pins of the J2 backplane connector defined in the PXI standard used by the Pixie-16. Pins not listed are not connected except for pull-ups recommended by the PXI standard. 9.3 Pinout of Digital Front Panel Connectors...

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