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Summary of Contents for Plexim RT Box TSP 2.0.5
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Modular Multilevel Converter Multi-tasking simulation of a grid-connected modular multilevel con- verter on the RT Box 2/3 Last updated in RT Box TSP 2.0.5 www.plexim.com Request a PLECS and PLECS Coder trial license Get the latest RT Box Target Support Package...
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1.1 Requirements To run this demo model, the following items are needed (available at www.plexim.com • One PLECS RT Box 1, 2 or 3 and one PLECS Coder license • One 37 pin Sub-D cable to connect the digital I/Os of the box front-to-front •...
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This concept is called implicit vectorization of the model structure and is further explained in the tutorial “Implicit Model Vectorization” available in the tutorials section of the Plexim website. Upper Side Upper Side...
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Figure 4: Circuit to allow physical system splitting The individual CPU load for each core becomes smaller and due to this, the average execution time can be reduced considerably. A reduced discretization step size leads to a better frequency resolution, www.plexim.com...
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CPU core of the RT Box 1, 2 or 3, or in multi- tasking mode on three CPU cores of the RT Box 2 or 3. Multi-tasking has the benefit that the average execution time can be reduced considerably. www.plexim.com...
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Plexim GmbH. PLECS is a registered trademark of Plexim GmbH. MATLAB, Simulink and Simulink Coder are regis- tered trademarks of The MathWorks, Inc. Other product or brand names are trademarks or registered...
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