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3. DRAWINGS: MODULE QW-1758
3-1. BLOCK DIAGRAM
C5
C3
C4
C2
C1
Tr3
L
PZ
12C1
12C5
13C5
13C1
8C5
9C5
10C5
11C5
17C5
16C5
6C1
7C1
8C1
9C1
10C1
6C2
7C2
8C2
9C2
10C2
6C4
7C4
8C4
9C4
10C4
6C3
7C3
8C3
9C3
10C3
6C5
7C5
53 52 51 50 49
1 2 3 4 5
21 22 23 24 25 26 27 28 29 30
44C2
46C2
43C2
48C2
48C1
46C1
43C1
46C5
43C5
41C2
LCD
L1
L53
XTB
LSI
XT
TOTAL
T1
BONDING 88PINS
T2
T3
BD
LD1
VDD
VSS2
VSSM
BAT1
C7
BAT2
An. B
PF
R.
PE
C6
TB
TE
13C2
13C4
13C3
15C5
20C5
19C5
18C5
17C1
16C1
11C1
20C1
19C1
18C1
17C2
16C2
11C2
20C2
19C2
18C2
17C4
16C4
11C4
20C4
19C4
18C4
17C3
16C3
11C3
20C3
19C3
18C3
44C5
45C5
41C5
38C5
36C5
31C3
47C1
45C1
42C1
39C1
36C1
30C1
47C4
44C4
42C4
39C4
36C4
33C4
34C4
31C4
39C2
37C2
34C2
31C2
40C1
37C1
34C1
32C1
40C5
37C5
35C5
32C5
LC1
LC5
91PINS
01
VCH
VSS3 VSS1
VC1
C1
SF
EL
SE
Tns1
Tr1
C5
Tr2
— 4 —
15C1
14C1
15C2
14C2
15C4
14C4
15C3
14C3
S1
KI4
S2
KI6
S3
KI5
S4
KI2
SL
KI1
KI3
KI7
KI8
AC
P1
P2
P3
P4
P5
VC2
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