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5
MBM29PL3200BE70PFV (MR MAIN BOARD ASSY : IC7152)
• Page Mode Flash Memory
Block Diagram
12, 18, 28,
V
CC
58, 63, 73
17, 27, 33,
V
SS
64, 74, 79
86
WE
82
DW/W
87
WP
(Command
ACC
88
80
CE
81
OE
57-51, 40-34,
A
~ A
19
2
11-8
A
, A
1
0
7, 6,
78
(A
)
- 1
Pin Function
No.
Pin Name
57-51, 40-34, 11-6, 78 A
- A
, A
19
0
78-75, 72-65, 62-59,
DQ
- DQ
31
32-19, 26-19, 16-13
80
CE
81
OE
86
WE
DW/W
82
87
WP
88
ACC
17, 27, 33, 64, 74, 79 V
SS
12, 18, 28, 58, 63, 73 V
CC
1-5, 41-50,
N.C.
83-85, 89, 90
5
6
Control
Circuit
Register)
Write Circuit
Low Vcc DET.
Write / Erase
Circuit
Pulse Timer
I/O
I
Address input
-1
I/O
Data input/output
0
I
Chip enable
I
Output enable
I
Write enable
I
16 bit, 32 bit mode switch
I
Write protect
I
Acceleration
−
Ground
−
Power supply
−
No connection
6
7
Erase Circuit
Chip Enable
Output Enable
Circuit
Y Decoder
STB
X Decoder
Pin Function
PDP-R05G
7
8
DQ
~ DQ
31
0
Input/Output
Buffer
STB
Data Latch
Y Gate
33,554,432
Cell Matrix
8
A
B
C
D
E
F
155
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