Block Diagram - LG S65T1-W Service Manual

BLOCK DIAGRAM

Analog L/R
Tuner
CS5346
Analog L/R
AUX
(3.3/5V)
Analog L/R
Slave
PTB
PCM1808
2-MIC
MIC_SIG
(3.3/5V)
(6.5Pie)
Slave
Optical
HDMI OUT
(ARC)
#14 ARC_SPDIF
TX_P/N, RX_P/N
Ethernet
DP2/DM2,DP0/DM0
USB/WIFI
BCK/LRCK/DATA
BT
Pickup
RF,A,B,C,D,E,F
45P/ FFC
5P: TRAY
BPT-641A
8P:MOTOR
M.Driver(9ch)
TPIC2050
M_MCLK
M_LRCK
M_SCLK
ADC_DATA
M_MCLK
M_LRCK
M_SCLK
MIC_DATA
OPT_SPDIF
TMDS_TX
MT8563
Master
(1.2/3.3V dual operating)
1440 DMIPS
Cortex-A7 CPU
395Pin, 15x15
0.65mmP BGA GAAP
DDR3 X1 NAND
512 MB 256 MB
(8 bit)
(4 Gbit)
PWM_RST/CLK/DAT
M_MCLK
27.0 MHz
Wake up/MDC
UART_RX/TX
*UART_TX/BT_RST
BT PWR on
:Quick Mode
BT
3.3VA
2-59 2-60
Sampling rate;
Max. 96 KHz input 48 KHz mp3 fix.(SMSC)
*.syncomm :bypass
24.576 MHz
M_BCK
M_LRCK
PWM
M_DATA[0~2]
PS9860
To Wireless TX
Wireless Interface
STB/CLK/DO
Micom
(R5F100LH)
64Pin, 12x12
E2P
ATMEL
0.5mmP QFP
Data[0]:FL/FR
Data[1]:RL/RR
Data[2]:C/SW
To AMP
AMP
TAS5612× × 3
PWM_BCK
PWM_LRCK
PWM_DATA[1]
SMSC Module
Wireless
TX Module
W3-2:Data[1]
To Front
VFD
MC3401