Integrated Drive Electronics (Ide) - HP Vectra XM5 4 Technical Reference Manual

Technical reference manual hardware and bios
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Further details, and the tables of supported video resolutions, can be found in the next chapter.

INTEGRATED DRIVE ELECTRONICS (IDE)

The IDE controller is implemented as part of the PCI/ISA bridge chip. It supports Enhanced IDE
(EIDE) and Standard IDE (Bus Master IDE). To use the Enhanced IDE features, though, hard
disk drives must be compliant with Enhanced IDE.
Up to four IDE devices can be supported: two connected to the primary channel cable, and two
to the secondary channel cable. The primary channel is fitted with an IDE cable with two grey
connectors; the secondary channel, though capable of supporting two devices, is fitted with an
IDE cable bearing only one red connector.
With EIDE, it is possible to have a fast device, such as a hard disk drive, and a slow device,
such as a CD-ROM, on the same channel without affecting the performance of the fast device.
The BIOS sends a command to each drive, and to determine, automatically, the fastest
configuration that it supports. However, in general, the primary channel cable (the grey one) is
recommended for hard disk drives, and the secondary channel cable (the red one) for CD-ROM
drives. Indeed, if a CD-ROM is placed on the same channel as a hard disk drive, problems
could be experienced activating the 32-bit access drivers.
Transfer Rates Versus Modes of Operation
There is an eight by 32-bit buffer for Bus Master IDE PCI burst transfers. The controller
supports 32-bit Windows and DOS I/O transfers (many IDE controllers use Windows integral
IDE driver which only supports 16-bit I/O transfers). It has PCI master capability, with a cycle
time of 90 ns, and a maximum transfer rate of 22 MB per second. It supports programmed I/O
(PIO) modes up to, and beyond, mode 4, and direct memory access (DMA) modes up to, and
beyond, mode 2. The PIO modes allow the following transfer rates:
Mode
Cycle time (ns)
Transfer rate (MBytes/s)
The DMA modes allow the following transfer rates:
Mode
Cycle time (ns)
Transfer rate (MBytes/s)
Disk Capacity Versus Modes of Addressing
The amount of addressable space on a hard disk drive is limited by three factors: the physical
size of the hard disk, the addressing limit of the IDE hardware, and the addressing limit of the
BIOS. The Extended-CHS addressing scheme allows larger disk capacities to be addressed
than under CHS, by performing a translation (for example regrouping the sectors so that there
are twice as many logical tracks as is possible under the CHS addressing scheme).
Cylinders
per Device
CHS
64
ECHS
64
LBA
-
0
1
2
600
383
240
3.33
5.22
8.33
0
1
2
480
150
120
4.2
13.3
16.7
Heads per
Sectors
Cylinder
per Track
16
1024
256
1024
256 M (=2 28 )
-
3
4
180
120
11.1
16.7
Bytes per
Bytes per
Sector
Device
512
528 M
512
8.4 G
512
137 G

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